Temperature Sensor Placement Including Routing Overhead and Sampling Inaccuracies

Ituero Herrero, Pablo; Garcia-Redondo, Fernando y López Vallejo, Marisa (2012). Temperature Sensor Placement Including Routing Overhead and Sampling Inaccuracies. En: "2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2012 International Conference on", 19/09/2012 - 21/09/2012, Sevilla. ISBN 978-1-4673-0685-0. pp. 69-72. https://doi.org/10.1109/SMACD.2012.6339419.

Descripción

Título: Temperature Sensor Placement Including Routing Overhead and Sampling Inaccuracies
Autor/es:
  • Ituero Herrero, Pablo
  • Garcia-Redondo, Fernando
  • López Vallejo, Marisa
Tipo de Documento: Ponencia en Congreso o Jornada (Artículo)
Título del Evento: 2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2012 International Conference on
Fechas del Evento: 19/09/2012 - 21/09/2012
Lugar del Evento: Sevilla
Título del Libro: 2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)
Fecha: Septiembre 2012
ISBN: 978-1-4673-0685-0
Materias:
Palabras Clave Informales: Accuracy, Monitoring, Resource management, Temperature measurement, Temperature sensors
Escuela: E.T.S.I. Telecomunicación (UPM)
Departamento: Ingeniería Electrónica
Licencias Creative Commons: Reconocimiento - Sin obra derivada - No comercial

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Resumen

Dynamic thermal management techniques require a collection of on-chip thermal sensors that imply a significant area and power overhead. Finding the optimum number of temperature monitors and their location on the chip surface to optimize accuracy is an NP-hard problem. In this work we improve the modeling of the problem by including area, power and networking constraints along with the consideration of three inaccuracy terms: spatial errors, sampling rate errors and monitor-inherent errors. The problem is solved by the simulated annealing algorithm. We apply the algorithm to a test case employing three different types of monitors to highlight the importance of the different metrics. Finally we present a case study of the Alpha 21364 processor under two different constraint scenarios.

Más información

ID de Registro: 20503
Identificador DC: http://oa.upm.es/20503/
Identificador OAI: oai:oa.upm.es:20503
Identificador DOI: 10.1109/SMACD.2012.6339419
URL Oficial: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6339419
Depositado por: Memoria Investigacion
Depositado el: 07 Oct 2013 17:03
Ultima Modificación: 21 Abr 2016 23:20
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