Power management techniques in an FPGA-Based WSN node for high performance application

Lombardo, Miguel; Camarero, Julio; Valverde Alcalá, Juan; Portilla Berrueco, Jorge; Torre Arnanz, Eduardo de la y Riesgo Alcaide, Teresa (2012). Power management techniques in an FPGA-Based WSN node for high performance application. En: "7th International Workshop Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)", 09/07/2012 - 11/07/2012, York, United Kingdom. pp. 1-5.

Descripción

Título: Power management techniques in an FPGA-Based WSN node for high performance application
Autor/es:
  • Lombardo, Miguel
  • Camarero, Julio
  • Valverde Alcalá, Juan
  • Portilla Berrueco, Jorge
  • Torre Arnanz, Eduardo de la
  • Riesgo Alcaide, Teresa
Tipo de Documento: Ponencia en Congreso o Jornada (Artículo)
Título del Evento: 7th International Workshop Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)
Fechas del Evento: 09/07/2012 - 11/07/2012
Lugar del Evento: York, United Kingdom
Título del Libro: 7th International Workshop Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)
Fecha: 2012
Materias:
Palabras Clave Informales: FPGA based WSN node; low power design; partial reconfiguration; power islands, energy management
Escuela: E.T.S.I. Industriales (UPM)
Departamento: Automática, Ingeniería Electrónica e Informática Industrial [hasta 2014]
Licencias Creative Commons: Reconocimiento - Sin obra derivada - No comercial

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Resumen

In this work, the power management techniques implemented in a high-performance node for Wireless Sensor Networks (WSN) based on a RAM-based FPGA are presented. This new node custom architecture is intended for high-end WSN applications that include complex sensor management like video cameras, high compute demanding tasks such as image encoding or robust encryption, and/or higher data bandwidth needs. In the case of these complex processing tasks, yet maintaining low power design requirements, it can be shown that the combination of different techniques such as extensive HW algorithm mapping, smart management of power islands to selectively switch on and off components, smart and low-energy partial reconfiguration, an adequate set of save energy modes and wake up options, all combined, may yield energy results that may compete and improve energy usage of typical low power microcontrollers used in many WSN node architectures. Actually, results show that higher complexity tasks are in favor of HW based platforms, while the flexibility achieved by dynamic and partial reconfiguration techniques could be comparable to SW based solutions.

Más información

ID de Registro: 20872
Identificador DC: http://oa.upm.es/20872/
Identificador OAI: oai:oa.upm.es:20872
Depositado por: Memoria Investigacion
Depositado el: 05 Mar 2014 16:57
Ultima Modificación: 22 Sep 2014 11:21
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