Sophisticated security verification on routing repaired balanced cell-based dual-rail logic against side channel analysis

He, Wei; Bhasin, Shivam; Otero Marnotes, Andres; Graba, Tarik; Torre Arnanz, Eduardo de la y Danger, Jean-Luc (2015). Sophisticated security verification on routing repaired balanced cell-based dual-rail logic against side channel analysis. "IET Information Security", v. 9 (n. 1); pp. 1-13. ISSN 1751-8709. https://doi.org/10.1049/iet-ifs.2013.0058.

Descripción

Título: Sophisticated security verification on routing repaired balanced cell-based dual-rail logic against side channel analysis
Autor/es:
  • He, Wei
  • Bhasin, Shivam
  • Otero Marnotes, Andres
  • Graba, Tarik
  • Torre Arnanz, Eduardo de la
  • Danger, Jean-Luc
Tipo de Documento: Artículo
Título de Revista/Publicación: IET Information Security
Fecha: Enero 2015
Volumen: 9
Materias:
Escuela: Centro de Electrónica Industrial (CEI) (UPM)
Departamento: Otro
Licencias Creative Commons: Reconocimiento - Sin obra derivada - No comercial

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Resumen

Conventional dual-rail precharge logic suffers from difficult implementations of dual-rail structure for obtaining strict compensation between the counterpart rails. As a light-weight and high-speed dual-rail style, balanced cell-based dual-rail logic (BCDL) uses synchronised compound gates with global precharge signal to provide high resistance against differential power or electromagnetic analyses. BCDL can be realised from generic field programmable gate array (FPGA) design flows with constraints. However, routings still exist as concerns because of the deficient flexibility on routing control, which unfavourably results in bias between complementary nets in security-sensitive parts. In this article, based on a routing repair technique, novel verifications towards routing effect are presented. An 8 bit simplified advanced encryption processing (AES)-co-processor is executed that is constructed on block random access memory (RAM)-based BCDL in Xilinx Virtex-5 FPGAs. Since imbalanced routing are major defects in BCDL, the authors can rule out other influences and fairly quantify the security variants. A series of asymptotic correlation electromagnetic (EM) analyses are launched towards a group of circuits with consecutive routing schemes to be able to verify routing impact on side channel analyses. After repairing the non-identical routings, Mutual information analyses are executed to further validate the concrete security increase obtained from identical routing pairs in BCDL.

Más información

ID de Registro: 29438
Identificador DC: http://oa.upm.es/29438/
Identificador OAI: oai:oa.upm.es:29438
Identificador DOI: 10.1049/iet-ifs.2013.0058
URL Oficial: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6983700
Depositado por: Memoria Investigacion
Depositado el: 19 Abr 2015 10:53
Ultima Modificación: 19 Abr 2015 10:53
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