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Analysis and Design Considerations for the Right Half -Plane Zero Cancellation on a Boost Derived dc/dc Converter

Díaz López, Daniel and García Suárez, Oscar and Oliver Ramírez, Jesús Angel and Alou Cervera, Pedro and Cobos Márquez, José Antonio (2008) Analysis and Design Considerations for the Right Half -Plane Zero Cancellation on a Boost Derived dc/dc Converter. In: 39th IEEE Power Electronics Specialists Conference (PESC), 15/06/2008-19/06/2008, Rodas (Grecia).

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Item Type:Presentation at Congress or Day (Article)
Authors/Creators:
Creators NameCreators email (if known)
Díaz López, Daniel
García Suárez, Oscar
Oliver Ramírez, Jesús Angel
Alou Cervera, Pedro
Cobos Márquez, José Antonio
Title:Analysis and Design Considerations for the Right Half -Plane Zero Cancellation on a Boost Derived dc/dc Converter
Event Title:39th IEEE Power Electronics Specialists Conference (PESC)
Event Dates:15/06/2008-19/06/2008
Event Location:Rodas (Grecia)
Title of Book:Proceedings of IEEE Power Electronics Specialists Conference, 2008 : PESC 2008
Publisher:IEEE Computer Society
Date:2008
ISBN:978-1-4244-1668-4
Department:Automation, Electronic Engineering and Industrial Computers
Faculty:E.T.S.I. Industrial (UPM)
Creative Commons licenses:Recognition - No derivative works - No commercial
Item ID:3349
Subjects:Electronics

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Official URL: http://www.thierry-lequeu.fr/data/PESC/PESC2008/index.html

Abstract

A boost derived topology, the two inductor boost with switch near ground presents some advantages over the conventional boost topology like continuous output current and MOSFET near ground [1]. The main advantage of this new topology is that the right half-plane (RHP) zero (inherent to the boost topology) can be cancelled by means of a new energy transference principle. This work presents a dynamic study of the topology and it shows that the RHP zero cancellation is not achieved for all design cases. The aim of this work is to develop a model for this topology in order to analyze the design requirements to obtain the RHP zero cancellation. A design condition has been derived from the dynamic analysis for achieving minimum phase characteristics on the new boost topology. The model and conclusions have been validated by means of an actual prototype. Considerations about the influence of the theoretical condition on the design and the field of application of this topology are shown in this paper.

Item Type:Presentation at Congress or Day (Article)
Subjects:Electronics
Código ID:3349
Depositado Por:Memoria Investigacion
Depositado el:15 Jun 2010 13:56
Last Modified:15 Jun 2010 13:56

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