Trade-off between Energy Savings and Execution Time Applying DVS to a Microprocessor

Vasic, Miroslav; García Suárez, Oscar; Oliver Ramírez, Jesús Angel; Alou Cervera, Pedro y Cobos Márquez, José Antonio (2008). Trade-off between Energy Savings and Execution Time Applying DVS to a Microprocessor.

Descripción

Título: Trade-off between Energy Savings and Execution Time Applying DVS to a Microprocessor
Autor/es:
  • Vasic, Miroslav
  • García Suárez, Oscar
  • Oliver Ramírez, Jesús Angel
  • Alou Cervera, Pedro
  • Cobos Márquez, José Antonio
Tipo de Documento: Artículo
Título del Evento: International Conference on Integration of Power Electronics Systems. CIPS 2008
Fechas del Evento: 11/03/2008-13/03/2008
Lugar del Evento: Nuremberg (Alemania)
Título del Libro: Proceedings of 5th International Conference on Integration of Power Electronics Circuits (CIPS)
Fecha: 2008
ISBN: 978-3-8007-3089-6
Materias:
Escuela: E.T.S.I. Industriales (UPM)
Departamento: Automática, Ingeniería Electrónica e Informática Industrial [hasta 2014]
Licencias Creative Commons: Reconocimiento - Sin obra derivada - No comercial

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Resumen

DVS (Dynamic Voltage Scaling) is a technique used for reducing the power consumption of microprocessors. The power consumed by these circuits has a main component (dynamic power) that is proportional to the square of the supply voltage. Additionally, for every supply voltage, there is a maximum value of the clock frequency. The advantage of using DVS is that the supply voltage (and hence clock frequency) can be adjusted depending on the specific needs during execution. The DVS concept has been used in some commercial products like Transmeta’s Crusoe [1], Intel Speed Step [2], AMD K6 [3], Hitachi SH4 [4], etc. The DVS algorithm proposed in this work is based on the trade-off between the application’s execution time and the energy consumed by the microprocessor. Indirectly, by controlling the execution time the consumed energy is controlled as well. Longer execution time provides less energy demanded by the CPU. The algorithm has been implemented on a platform with an Intel XScale PXA255 microprocessor and the energy saving has been calculated directly measuring currents and voltages on the platform. Using this technique it is possible to achieve up to 50% of power savings, with 50% longer execution time.

Más información

ID de Registro: 3436
Identificador DC: http://oa.upm.es/3436/
Identificador OAI: oai:oa.upm.es:3436
URL Oficial: http://www.vde-ostwestfalen-lippe.de/Conferences_en/CIPS+2008/CIPS+2008.htm
Depositado por: Memoria Investigacion
Depositado el: 25 Jun 2010 11:49
Ultima Modificación: 20 Abr 2016 12:59
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