Building memristor applications: from device model to circuit design

García Redondo, Fernando and López Vallejo, Marisa and Ituero Herrero, Pablo (2014). Building memristor applications: from device model to circuit design. "IEEE Transactions on Nanotechnology", v. 13 (n. 6); pp. 1154-1162. ISSN 1536-125X. https://doi.org/10.1109/TNANO.2014.2345093.

Description

Title: Building memristor applications: from device model to circuit design
Author/s:
  • García Redondo, Fernando
  • López Vallejo, Marisa
  • Ituero Herrero, Pablo
Item Type: Article
Título de Revista/Publicación: IEEE Transactions on Nanotechnology
Date: November 2014
ISSN: 1536-125X
Volume: 13
Subjects:
Freetext Keywords: Design framework, memristor, process variations, simulation, spice
Faculty: E.T.S.I. Telecomunicación (UPM)
Department: Ingeniería Electrónica
Creative Commons Licenses: Recognition - No derivative works - Non commercial

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Abstract

Since the memristor was first built in 2008 at HP Labs, no end of devices and models have been presented. Also, new applications appear frequently. However, the integration of the device at the circuit level is not straightforward, because available models are still immature and/or suppose high computational loads, making their simulation long and cumbersome. This study assists circuit/systems designers in the integration of memristors in their applications, while aiding model developers in the validation of their proposals. We introduce the use of a memristor application framework to support the work of both the model developer and the circuit designer. First, the framework includes a library with the best-known memristor models, being easily extensible with upcoming models. Systematic modifications have been applied to these models to provide better convergence and significant simulations speedups. Second, a quick device simulator allows the study of the response of the models under different scenarios, helping the designer with the stimuli and operation time selection. Third, fine tuning of the device including parameters variations and threshold determination is also supported. Finally, SPICE/Spectre subcircuit generation is provided to ease the integration of the devices in application circuits. The framework provides the designer with total control overconvergence, computational load, and the evolution of system variables, overcoming usual problems in the integration of memristive devices.

More information

Item ID: 35984
DC Identifier: http://oa.upm.es/35984/
OAI Identifier: oai:oa.upm.es:35984
DOI: 10.1109/TNANO.2014.2345093
Official URL: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6868984
Deposited by: Memoria Investigacion
Deposited on: 01 Jul 2015 16:25
Last Modified: 01 Jul 2015 16:25
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