An optimization algorithm to design fast and robust analog controls for Buck converters

Cortés González, Jorge; Svikovic, Vladimir; Alou Cervera, Pedro; Oliver Ramírez, Jesús Angel y Cobos Marquez, Jose Antonio (2014). An optimization algorithm to design fast and robust analog controls for Buck converters. En: "15th Workshop on Control and Modeling for Power Electronics (COMPEL 2014)", 22/06/2014 - 25/06/2014, Santander, Spain. pp. 1-10. https://doi.org/10.1109/COMPEL.2014.6877166.

Descripción

Título: An optimization algorithm to design fast and robust analog controls for Buck converters
Autor/es:
  • Cortés González, Jorge
  • Svikovic, Vladimir
  • Alou Cervera, Pedro
  • Oliver Ramírez, Jesús Angel
  • Cobos Marquez, Jose Antonio
Tipo de Documento: Ponencia en Congreso o Jornada (Artículo)
Título del Evento: 15th Workshop on Control and Modeling for Power Electronics (COMPEL 2014)
Fechas del Evento: 22/06/2014 - 25/06/2014
Lugar del Evento: Santander, Spain
Título del Libro: 15th Workshop on Control and Modeling for Power Electronics (COMPEL 2014)
Fecha: 2014
Materias:
Palabras Clave Informales: Control of DC/DC converters, fast, robustness, voltage mode, v2, v2ic, optimization
Escuela: Centro de Electrónica Industrial (CEI) (UPM)
Departamento: Automática, Ingeniería Eléctrica y Electrónica e Informática Industrial
Licencias Creative Commons: Reconocimiento - Sin obra derivada - No comercial

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Resumen

Ripple-based controls are popular to achieve a fast dynamic response, but the design of these controls assuring robustness is not easy due to its intrinsic nonlinear nature. These techniques often rely on sensing networks heavily dependent on parasitic elements to estimate the inductor current or the capacitor current. Consequently, a modeling technique that takes into account these sensors and parasitic elements is needed. This paper proposes an optimization algorithm to design a wide variety of controls that can take into account the parasitic elements and tolerances of the converter. The proposed algorithm can be used to design very fast controls that are also robust in a real-world implementation. This algorithm is verified on a 300kHz Buck converter with Voltage mode and a 1.3MHz Buck converter with V2Ic control.

Más información

ID de Registro: 36309
Identificador DC: http://oa.upm.es/36309/
Identificador OAI: oai:oa.upm.es:36309
Identificador DOI: 10.1109/COMPEL.2014.6877166
URL Oficial: http://ieeexplore.ieee.org/document/6877166/
Depositado por: Memoria Investigacion
Depositado el: 28 Mar 2017 16:54
Ultima Modificación: 28 Mar 2017 16:54
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