Analysis of design alternatives on using dynamic and partial reconfiguration in a space application

Veljković, Filip; Riesgo Alcaide, Teresa; Berrojo, Luis; Regada, Raúl; Álvaro Castellanos, Ángel de y Torre Arnanz, Eduardo de la (2014). Analysis of design alternatives on using dynamic and partial reconfiguration in a space application. En: "Data Systems in Aerospace (DASIA 2014)", 03/06/2014 - 05/06/2014, Warsaw, Poland. pp. 1-7.

Descripción

Título: Analysis of design alternatives on using dynamic and partial reconfiguration in a space application
Autor/es:
  • Veljković, Filip
  • Riesgo Alcaide, Teresa
  • Berrojo, Luis
  • Regada, Raúl
  • Álvaro Castellanos, Ángel de
  • Torre Arnanz, Eduardo de la
Tipo de Documento: Ponencia en Congreso o Jornada (Artículo)
Título del Evento: Data Systems in Aerospace (DASIA 2014)
Fechas del Evento: 03/06/2014 - 05/06/2014
Lugar del Evento: Warsaw, Poland
Título del Libro: Data Systems in Aerospace (DASIA 2014)
Fecha: 2014
Volumen: 725
Materias:
Palabras Clave Informales: SRAM-based FPGAs; scalable dynamic and partial reconfiguration; scalability; on-board processor; space application
Escuela: Centro de Electrónica Industrial (CEI) (UPM)
Departamento: Automática, Ingeniería Eléctrica y Electrónica e Informática Industrial
Licencias Creative Commons: Reconocimiento - Sin obra derivada - No comercial

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Resumen

Some of the biggest concerns in space systems are power consumption and reliability due to the limited power generated by the system's energy harvesters and the fact that once deployed, it is almost impossible to perform maintenance or repairs. Another consideration is that during deployment, the high exposure to electromagnetic radiation can cause single event damage effects including SEUs, SEFIs, SETs and others. In order to mitigate these problems inherent to the space environment, a system with dynamic and partial reconfiguration capabilities is proposed. This approach provide s the flexibility to reconfigure parts of the FPGA while still in operation, thus making the system more flexible, fault tolerant and less power-consuming. In this paper, several partial reconfiguration approaches are proposed and compared in terms of device occupation, power consumption, reconfiguration speed and size of memory footprints.

Más información

ID de Registro: 37139
Identificador DC: http://oa.upm.es/37139/
Identificador OAI: oai:oa.upm.es:37139
Depositado por: Memoria Investigacion
Depositado el: 01 Abr 2017 11:47
Ultima Modificación: 01 Abr 2017 11:47
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