Dynamic management of multikernel multithread accelerators using dynamic partial reconfiguration

Rodríguez Medina, Alfonso and Valverde Alcalá, Juan and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2014). Dynamic management of multikernel multithread accelerators using dynamic partial reconfiguration. In: "9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC 2014)", 26/05/2014 - 28/05/2014, Montpellier, France. pp. 1-7. https://doi.org/10.1109/ReCoSoC.2014.6861363.

Description

Title: Dynamic management of multikernel multithread accelerators using dynamic partial reconfiguration
Author/s:
  • Rodríguez Medina, Alfonso
  • Valverde Alcalá, Juan
  • Torre Arnanz, Eduardo de la
  • Riesgo Alcaide, Teresa
Item Type: Presentation at Congress or Conference (Article)
Event Title: 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC 2014)
Event Dates: 26/05/2014 - 28/05/2014
Event Location: Montpellier, France
Title of Book: 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC 2014)
Date: 2014
Subjects:
Freetext Keywords: Dynamic and Partial Reconfiguration, Dynamic Resource Management, FPGA, Parallel Computing
Faculty: Centro de Electrónica Industrial (CEI) (UPM)
Department: Automática, Ingeniería Eléctrica y Electrónica e Informática Industrial
Creative Commons Licenses: Recognition - No derivative works - Non commercial

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Abstract

Ever demanding systems with restricted resources face increasingly complex applications. Additionally, changeable environments modify working conditions over time. Therefore, a dynamic resource management is required in order to provide adaptation capabilities. By using ARTICo3, a bus-based architecture with reconfigurable slots, this adaptation is accomplished in three different but dependent areas: Consumption, Confidentiality and fault tolerance, and Computation. The proposed resource management strategies rely on an architecture and a model of computation that make execution configuration to be application-independent, but context-aware, since a CUDA-like execution model is used. The inherent and explicit application-level parallelism of multithreaded CUDA kernels is used to generate hardware accelerators that act as thread blocks. Despite other modes of operation provided by the ARTICo3 architecture, like module redundancy or dual-rail operation to mitigate Side-Channel Attacks, these thread blocks are dynamically managed and their execution is scheduled using a multiobjective optimization algorithm.

Funding Projects

TypeCodeAcronymLeaderTitle
Government of SpainTEC2011-28666-C04-02DREAMSUnspecifiedUnspecified

More information

Item ID: 37141
DC Identifier: http://oa.upm.es/37141/
OAI Identifier: oai:oa.upm.es:37141
DOI: 10.1109/ReCoSoC.2014.6861363
Official URL: http://ieeexplore.ieee.org/document/6861363/
Deposited by: Memoria Investigacion
Deposited on: 01 Apr 2017 12:15
Last Modified: 01 Apr 2017 12:15
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