Adaptive reconfigurable voting for enhanced reliability in medium-grained fault tolerant architectures

Veljković, Filip and Riesgo Alcaide, Teresa and Torre Arnanz, Eduardo de la (2015). Adaptive reconfigurable voting for enhanced reliability in medium-grained fault tolerant architectures. In: "NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2015)", 15/06/2015 - 18/06/2015, Montreal, Canadá. pp. 1-8. https://doi.org/10.1109/AHS.2015.7231165.

Description

Title: Adaptive reconfigurable voting for enhanced reliability in medium-grained fault tolerant architectures
Author/s:
  • Veljković, Filip
  • Riesgo Alcaide, Teresa
  • Torre Arnanz, Eduardo de la
Item Type: Presentation at Congress or Conference (Article)
Event Title: NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2015)
Event Dates: 15/06/2015 - 18/06/2015
Event Location: Montreal, Canadá
Title of Book: NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2015)
Date: 2015
Subjects:
Freetext Keywords: TMR voting, ICAP-based voting, medium-grained TMR, scalable partial reconfiguration, gcapture, on-board processor, fully reconfigurable TMR, TMR with spare, adaptive voter, soft and permanent errors
Faculty: Centro de Electrónica Industrial (CEI) (UPM)
Department: Automática, Ingeniería Eléctrica y Electrónica e Informática Industrial
Creative Commons Licenses: Recognition - No derivative works - Non commercial

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Abstract

The impact of SRAM-based FPGAs is constantly growing in aerospace industry despite the fact that their volatile configuration memory is highly susceptible to radiation effects. Therefore, strong fault-handling mechanisms have to be developed in order to protect the design and make it capable of fighting against both soft and permanent errors. In this paper, a fully reconfigurable medium-grained triple modular redundancy (TMR) architecture which forms part of a runtime adaptive on-board processor (OBP) is presented. Fault mitigation is extended to the voting mechanism by applying our reconfiguration methodology not only to domain replicas but also to the voter itself. The proposed approach takes advantage of adaptive configuration placement and modular property of the OBP, thus allowing on-line creation of different medium-grained TMRs and selection of their granularity level. Consequently, we are able to narrow down the fault-affected area thus making the error recovery process faster and less power consuming. The conventional hardware based voting is supported by the ICAP-based one in order to additionally strengthen the reconfigurable intermediate voting. In addition, the implementation methodology ensures using only one memory footprint for all voters and their voting adaptations thus saving storing resources in expensive rad-hard memories.

More information

Item ID: 42594
DC Identifier: http://oa.upm.es/42594/
OAI Identifier: oai:oa.upm.es:42594
DOI: 10.1109/AHS.2015.7231165
Official URL: http://ieeexplore.ieee.org/document/7231165/
Deposited by: Memoria Investigacion
Deposited on: 25 Apr 2017 15:09
Last Modified: 25 Apr 2017 15:09
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