Adaptive reconfigurable voting for enhanced reliability in medium-grained fault tolerant architectures

Veljković, Filip; Riesgo Alcaide, Teresa y Torre Arnanz, Eduardo de la (2015). Adaptive reconfigurable voting for enhanced reliability in medium-grained fault tolerant architectures. En: "NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2015)", 15/06/2015 - 18/06/2015, Montreal, Canadá. pp. 1-8. https://doi.org/10.1109/AHS.2015.7231165.

Descripción

Título: Adaptive reconfigurable voting for enhanced reliability in medium-grained fault tolerant architectures
Autor/es:
  • Veljković, Filip
  • Riesgo Alcaide, Teresa
  • Torre Arnanz, Eduardo de la
Tipo de Documento: Ponencia en Congreso o Jornada (Artículo)
Título del Evento: NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2015)
Fechas del Evento: 15/06/2015 - 18/06/2015
Lugar del Evento: Montreal, Canadá
Título del Libro: NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2015)
Fecha: 2015
Materias:
Palabras Clave Informales: TMR voting, ICAP-based voting, medium-grained TMR, scalable partial reconfiguration, gcapture, on-board processor, fully reconfigurable TMR, TMR with spare, adaptive voter, soft and permanent errors
Escuela: Centro de Electrónica Industrial (CEI) (UPM)
Departamento: Automática, Ingeniería Eléctrica y Electrónica e Informática Industrial
Licencias Creative Commons: Reconocimiento - Sin obra derivada - No comercial

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Resumen

The impact of SRAM-based FPGAs is constantly growing in aerospace industry despite the fact that their volatile configuration memory is highly susceptible to radiation effects. Therefore, strong fault-handling mechanisms have to be developed in order to protect the design and make it capable of fighting against both soft and permanent errors. In this paper, a fully reconfigurable medium-grained triple modular redundancy (TMR) architecture which forms part of a runtime adaptive on-board processor (OBP) is presented. Fault mitigation is extended to the voting mechanism by applying our reconfiguration methodology not only to domain replicas but also to the voter itself. The proposed approach takes advantage of adaptive configuration placement and modular property of the OBP, thus allowing on-line creation of different medium-grained TMRs and selection of their granularity level. Consequently, we are able to narrow down the fault-affected area thus making the error recovery process faster and less power consuming. The conventional hardware based voting is supported by the ICAP-based one in order to additionally strengthen the reconfigurable intermediate voting. In addition, the implementation methodology ensures using only one memory footprint for all voters and their voting adaptations thus saving storing resources in expensive rad-hard memories.

Más información

ID de Registro: 42594
Identificador DC: http://oa.upm.es/42594/
Identificador OAI: oai:oa.upm.es:42594
Identificador DOI: 10.1109/AHS.2015.7231165
URL Oficial: http://ieeexplore.ieee.org/document/7231165/
Depositado por: Memoria Investigacion
Depositado el: 25 Abr 2017 15:09
Ultima Modificación: 25 Abr 2017 15:09
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