A Self-Tuned Thermal Compensation System for Reducing Process Variation Influence in Side-Channel Attack Resistant Dual-Rail Logic

He, Wei and Stottinger, Marc and Torre Arnanz, Eduardo de la and Díaz, Verónica (2015). A Self-Tuned Thermal Compensation System for Reducing Process Variation Influence in Side-Channel Attack Resistant Dual-Rail Logic. In: "2015 Conference on Design of Circuits and Integrated Systems (DCIS 2015)", 25-27 November 2015, Estoril (Portugal). ISBN 978-1-4673-7228-2. pp. 1-8.

Description

Title: A Self-Tuned Thermal Compensation System for Reducing Process Variation Influence in Side-Channel Attack Resistant Dual-Rail Logic
Author/s:
  • He, Wei
  • Stottinger, Marc
  • Torre Arnanz, Eduardo de la
  • Díaz, Verónica
Item Type: Presentation at Congress or Conference (Article)
Event Title: 2015 Conference on Design of Circuits and Integrated Systems (DCIS 2015)
Event Dates: 25-27 November 2015
Event Location: Estoril (Portugal)
Title of Book: 2015 Conference on Design of Circuits and Integrated Systems (DCIS 2015)
Date: 2015
ISBN: 978-1-4673-7228-2
Subjects:
Faculty: E.T.S.I. Industriales (UPM)
Department: Automática, Ingeniería Eléctrica y Electrónica e Informática Industrial
Creative Commons Licenses: Recognition - No derivative works - Non commercial

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Abstract

Dual-rail Precharged Logic (DPL) theoretically withstands Side-Channel Attacks owing to its physical-level compensation manner between the tailored complementary rails. However, the security grade of DPLs can be severely impaired by the innate silicon Process Variation (PV), even the two rails are identically constructed. In this paper, an active thermal compensation system is presented to alleviate the PV-relevant security tension for SCA-resistant dual-rail logic. The devised system consists of a Ring-Oscillator (RO) based temperature sensor pair and two groups of heat generators, respectively scaled with each of the complementary crypto cores. The heaters are automatically switched on in accordance to the frequency difference measured by the ROs. The more secure compensation is achieved by tuning the local thermal to the one wherein higher RO frequency is detected, for affecting the local electrical characteristics to slow down the higher frequency. The protocol of the system and the implementation flow are detailed in this paper. The security verifications are validated by employing the RO thermal system to a lightweight crypto coprocessor in its identical dual-rail format. The experiment results certified elevated security grade to the crypto cores on Virtex-5 FPGA when the thermal compensation system is switched on.

More information

Item ID: 42601
DC Identifier: http://oa.upm.es/42601/
OAI Identifier: oai:oa.upm.es:42601
Deposited by: Memoria Investigacion
Deposited on: 18 Jul 2016 15:46
Last Modified: 19 Jul 2016 13:46
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