Reconfigurable writing architecture for reliable RRAM operation in wide temperature ranges

García Redondo, Fernando; Royer del Barrio, Pablo; López Vallejo, Marisa; Aparicio Cerqueira, Hernán; Ituero Herrero, Pablo y López Barrio, Carlos Alberto (2016). Reconfigurable writing architecture for reliable RRAM operation in wide temperature ranges. "IEEE Transactions on very large scale integration (VLSI) Systems", v. 25 (n. 4); pp. 1224-1235. ISSN 1557-9999. https://doi.org/10.1109/TVLSI.2016.2634083.

Descripción

Título: Reconfigurable writing architecture for reliable RRAM operation in wide temperature ranges
Autor/es:
  • García Redondo, Fernando
  • Royer del Barrio, Pablo
  • López Vallejo, Marisa
  • Aparicio Cerqueira, Hernán
  • Ituero Herrero, Pablo
  • López Barrio, Carlos Alberto
Tipo de Documento: Artículo
Título de Revista/Publicación: IEEE Transactions on very large scale integration (VLSI) Systems
Fecha: 19 Diciembre 2016
Volumen: 25
Materias:
Palabras Clave Informales: Writing, Switches, Power demand, Temperature distribution,Integrated circuit reliability
Escuela: E.T.S.I. Telecomunicación (UPM)
Departamento: Ingeniería Electrónica
Licencias Creative Commons: Reconocimiento - Sin obra derivada - No comercial

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Resumen

Resistive switching memories [resistive RAM (RRAM)] are an attractive alternative to nonvolatile storage and nonconventional computing systems, but their behavior strongly depends on the cell features, driver circuit, and working conditions. In particular, the circuit temperature and writing voltage schemes become critical issues, determining resistive switching memories performance. These dependencies usually force a design time tradeoff among reliability, device endurance, and power consumption, thereby imposing nonflexible functioning schemes and limiting the system performance. In this paper, we present a writing architecture that ensures the correct operation no matter the working temperature and allows the dynamic load of application-oriented writing profiles. Thus, taking advantage of more efficient configurations, the system can be dynamically adapted to overcome RRAM intrinsic challenges. Several profiles are analyzed regarding power consumption, temperature-variations protection, and operation speed, showing speedups near 700x compared with other published drivers.

Más información

ID de Registro: 45494
Identificador DC: http://oa.upm.es/45494/
Identificador OAI: oai:oa.upm.es:45494
Identificador DOI: 10.1109/TVLSI.2016.2634083
URL Oficial: http://ieeexplore.ieee.org/document/7790903/
Depositado por: Memoria Investigacion
Depositado el: 07 May 2017 10:05
Ultima Modificación: 07 May 2017 10:05
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