Design, simulation and optimization of a slotted waveguide array with central feed and low sidelobes

Ripoll Solano, Lácides and Torres Herrera, Luis and Sierra Pérez, Manuel (2018). Design, simulation and optimization of a slotted waveguide array with central feed and low sidelobes. In: "IEEE-APS Topical Conference on Antennas and Propagation in Wireless Communications (APWC 2018)", 10/09/2018 - 14/09/2018, Cartagena des Indias, Colombia. pp. 1-4. https://doi.org/10.1109/APWC.2018.8503799.

Description

Title: Design, simulation and optimization of a slotted waveguide array with central feed and low sidelobes
Author/s:
  • Ripoll Solano, Lácides
  • Torres Herrera, Luis
  • Sierra Pérez, Manuel
Item Type: Presentation at Congress or Conference (Article)
Event Title: IEEE-APS Topical Conference on Antennas and Propagation in Wireless Communications (APWC 2018)
Event Dates: 10/09/2018 - 14/09/2018
Event Location: Cartagena des Indias, Colombia
Title of Book: IEEE-APS Topical Conference on Antennas and Propagation in Wireless Communications (APWC 2018)
Date: October 2018
Subjects:
Freetext Keywords: Antenna, slot, resonant, slotted-waveguide, bandwidth, optimization
Faculty: E.T.S.I. Telecomunicación (UPM)
Department: Señales, Sistemas y Radiocomunicaciones
Creative Commons Licenses: Recognition - No derivative works - Non commercial

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Abstract

Slotted-waveguide arrays (SWA) have been employed in radar, remote sensing, and communication applications where narrow-beam or shaped-beam patterns are required. One of the most common configurations for resonant SWA places longitudinal slots located in the broad face of a rectangular guide which is fed by one end and is shorted at the other. However, the relative bandwidth achieved in these arrays is about 1%. This paper present the design, optimization and simulation of a two-layer centrally-fed waveguide slot array antenna with ten slots (2×10) operating at 12 GHz, that achieves a bandwidth of 4% (440 MHz) at a return loss level of-14 dB. The design was a two-step process, first meeting the bandwidth requirement, and then a sidelobe level (SLL) of 20 dB. To achieve the SLL, the excitation coefficients were improved with a least-square optimization approach. The resulting radiation diagram computed from the models run in Matlab were verified with CST Microwave Studio, which takes as input the physical dimensions of the array and the locations of the slots. The design requirements were satisfactorily met.

More information

Item ID: 54832
DC Identifier: http://oa.upm.es/54832/
OAI Identifier: oai:oa.upm.es:54832
DOI: 10.1109/APWC.2018.8503799
Official URL: https://ieeexplore.ieee.org/document/8503799
Deposited by: Memoria Investigacion
Deposited on: 30 Apr 2019 18:11
Last Modified: 30 Apr 2019 18:11
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