Items where author is "Riesgo Alcaide, Teresa"

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Article

Mujica Rojas, Gabriel Noe and Rodríguez Zurrunero, Roberto and Wilby ., Mark Richard and Portilla Berrueco, Jorge and Rodríguez González, Ana Belén and Araujo Pinto, Álvaro and Riesgo Alcaide, Teresa and Vinagre Díaz, Juan José (2018). Edge and fog computing platform for data fusion of complex heterogeneous sensors. "Sensors", v. 18 (n. 3630); pp. 1-26. ISSN 1424-8220. https://doi.org/10.3390/s18113630.

Li, Wei and Portilla Berrueco, Jorge and Moreno González, Félix Antonio and Liang, Guixuan and Riesgo Alcaide, Teresa (2015). Multiple feature points representation in target localization of wireless visual sensor networks. "Journal of Network and Computer Applications", v. 57 ; pp. 119-128. ISSN 1084-8045. https://doi.org/10.1016/j.jnca.2015.07.013.

He, Danping and Mujica Rojas, Gabriel Noe and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2015). Modelling and planning reliable wireless sensor networks based on multi-objective optimization genetic algorithm with changeable length. "Journal of Heuristics", v. 21 (n. 2); pp. 257-300. ISSN 1381-1231. https://doi.org/10.1007/s10732-014-9261-2.

Mujica Rojas, Gabriel Noe and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2015). Performance evaluation of an AODV-based routing protocol implementation by using a novel in-field WSN diagnosis tool. "Microprocessors and Microsystems", v. 39 (n. 8); pp. 920-938. ISSN 0141-9331. https://doi.org/10.1016/j.micpro.2015.10.007.

He, Danping and Liang, Guixuan and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2012). A Novel Method for Radio Propagation Simulation Based on Automatic 3D Environment Reconstruction. "Radioengineering", v. 21 (n. 4); pp. 985-992. ISSN 1210-2512.

Salvador Perea, Rubén and Moreno González, Félix Antonio and Riesgo Alcaide, Teresa and Vidal, Alberto and Sekanina, Lukás (2012). Accelerating FPGA-based evolution of wavelet transform filters by optimized task scheduling. "Microprocessors and Microsystems", v. 36 (n. 5); pp. 427-438. ISSN 0141-9331. https://doi.org/10.1016/j.micpro.2012.02.002.

Portilla Berrueco, Jorge and Otero Marnotes, Andres and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa and Stecklina, Oliver and Peter, S. and Langendörfer, Peter (2010). Adaptable Security in Wireless Sensor Networks by Using Reconfigurable ECC Hardware Coprocessors. "International Journal on Distributed Sensor Networks", v. 2011 ; pp. 1-12. ISSN 1550-1477. https://doi.org/10.1155/2010/740823.

Salvador Perea, Rubén and Moreno González, Félix Antonio and Riesgo Alcaide, Teresa and Sekanina, Lukás (2010). Evolutionary Approach to Improve Wavelet Transforms for Image Compression in Embedded Systems. "EURASIP Journal on Advances in Signal Processing", v. 2011 (n. 973806); pp. 1-20. ISSN 1687-6172. https://doi.org/10.1155/2011/973806.

Moreno González, Félix Antonio and Alarcón, Jaime and Salvador Perea, Rubén and Riesgo Alcaide, Teresa (2009). Reconfigurable hardware architecture of a shape recognition system based on specialized tiny neural networks with online training.. "IEEE Transactions on Industrial Electronics.", v. 56 (n. 8); pp. 3253-3263. ISSN 0278-0046. https://doi.org/10.1109/TIE.2009.2022076.

Durrani, Yaseer A. and Riesgo Alcaide, Teresa (2009). Power Estimation Technique for DSP Architectures.. "Digital Signal Processing.", v. 19 (n. 2); pp. 213-219. ISSN 1051-2004. https://doi.org/10.1016/j.dsp.2008.09.005.

Sánchez, Almudena M. and Prieto López, Roberto and Laso Carbajo, Manuel and Riesgo Alcaide, Teresa (2008). A Piezoelectric Minirheometer for Measuring the Viscosity of Polymer Microsamples. "IEEE Transactions on Industrial Electronics", v. 55 (n. 1); pp. 4274-436. ISSN 0278-0046.

Presentation at Congress or Conference

Mariño Andrés, Rodrigo and Lanza-Gutiérrez, José Manuel and Riesgo Alcaide, Teresa and Holgado Bolaños, Miguel (2018). Design Space Exploration for PCA Implementation of Embedded Learning in FPGAs. In: "2018 IEEE International Symposium on Circuits and Systems (ISCAS)", 27–30 May 2018, Florence, Italy. ISBN 978-1-5386-4881-0. pp. 1-5. https://doi.org/10.1109/ISCAS.2018.8351540.

Mujica Rojas, Gabriel Noe and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2018). Distributed Code Dissemination Strategy for IoT Collaborative Reprogramming on the Edge. In: "Jornadas SARTECO 2018", 12-14 de septiembre de 2018, Teruel, España. pp. 1-6.

Blanco Garrido, Cristina and Mariño Andrés, Rodrigo and Lanza-Gutiérrez, José Manuel and Riesgo Alcaide, Teresa (2018). Haar-Like feature implementation on FPGAs for Advanced Driver-Assistant Systems. In: "DCIS 2017: XXXII Conference on Design of Circuits and Integrated Systems", 14th-16th November 2018, Lyon, France. ISBN 978-1-7281-0171-2. pp. 1-8.

Zornoza Sánchez-Lozano, Jaime Gonzalo and Mujica Rojas, Gabriel Noe and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2018). Smart Self-Adaptive Clustering Technique for Collaborative Sensing in IoT Risk Contexts. In: "EWSN ’18. 2018 International Conference on Embedded Wireless Systems and Networks", February 14 - 16, 2018, Madrid, España. ISBN 978-0-9949886-2-1. pp. 187-188.

Miranda, J. A. and Canabal, M. F. and Lanza-Gutiérrez, José Manuel and Portela-García, M. and López-Ongil, C. and Riesgo Alcaide, Teresa (2017). Meaningful Data Treatment from Multiple Physiological Sensors in a Cyber-Physical System. In: "DCIS 2017: XXXII Conference on Design of Circuits and Integrated Systems", 22nd-24th November 2017, Barcelona (Spain). pp. 100-104.

Maigler López, Mª Victoria and Holgado Bolaños, Miguel and Santamaría Fernández, Beatriz and López Hernández, Ana and Lavín Hueros, Álvaro and Laguna Heras, Maria Fe and Sanza Gutiérrez, Francisco Javier and Granados, David and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2017). Novel optoelectronic platform for label-free biosensing of influenza detection based on interferometric transducers. In: "10ª Reunión Española de Optoelectrónica, OPTOEL17", 12-14 julio de 2017, Santiago de Compostela, España. pp. 1-5.

Mujica Rojas, Gabriel Noe and García, Alejandro and Gordillo, Javier and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2015). A novel on-site deployment, commissioning and debugging technique to assess and validate WSN based smart systems. In: "IEEE International Symposium on Circuits and Systems (ISCAS 2015)", 24/05/2015 - 27/05/2017, Lisbon, Portugal. ISBN 978-1-4799-8391-9. pp. 1722-1725. https://doi.org/10.1109/ISCAS.2015.7168985.

Veljković, Filip and Riesgo Alcaide, Teresa and Torre Arnanz, Eduardo de la (2015). Adaptive reconfigurable voting for enhanced reliability in medium-grained fault tolerant architectures. In: "NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2015)", 15/06/2015 - 18/06/2015, Montreal, Canadá. pp. 1-8. https://doi.org/10.1109/AHS.2015.7231165.

Rodríguez Medina, Alfonso and Valverde Alcalá, Juan and Castañares Franco, César and Portilla Berrueco, Jorge and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2015). Execution modeling in self-aware FPGA-based architectures for efficient resource management. In: "10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2015)", 29/06/2015 - 01/07/2015, Bremen, Germany. pp. 1-8. https://doi.org/10.1109/ReCoSoC.2015.7238086.

Mora de Sambricio, Javier and Otero Marnotes, Andres and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2015). Fast and compact evolvable systolic arrays on dynamically reconfigurable FPGAs. In: "10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2015)", 29/06/2015 - 01/07/2015, Bremen, Germany. pp. 1-7. https://doi.org/10.1109/ReCoSoC.2015.7238087.

Rodríguez Medina, Alfonso and Valverde Alcalá, Juan and Castañares Franco, César and Portilla Berrueco, Jorge and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2015). Live Demonstration: A Dynamically Adaptable Image Processing Application Running in an FPGA-Based WSN Platform. In: "IEEE International Symposium on Published in: Circuits and Systems (ISCAS 2015)", 24/05/2015 - 27/05/2017, Lisbon, Portugal. pp. 1902-1908. https://doi.org/10.1109/ISCAS.2015.7169035.

Gordillo, Javier and Mujica Rojas, Gabriel Noe and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2015). Novel cluster-based routing protocol optimization approach for wireless sensor mesh networking. In: "VI Jornadas de Computación Empotrada (JCE 2015)", 23/09/2015 - 25/09/2015, Córdoba, Spain. pp. 1-9.

Mujica Rojas, Gabriel Noe and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2015). Testbed architecture and framework for debugging wireless sensor networks. In: "Conference on Design of Circuits and Integrated Systems (DCIS 2015)", 25/11/2015 - 27/11/2015, Estoril, Portugal. pp. 1-8. https://doi.org/10.1109/DCIS.2015.7388601.

Valverde Alcalá, Juan and Rodríguez, A. and Camarero, J.J. and Otero, A. and Portilla Berrueco, Jorge and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2014). A Dynamically Adaptable Bus Architecture for Trading-Off Among Performance, Consumption and Dependability in Cyber-Physical Systems. In: "24th International Conference on Field Programmable Logic and Applications", September 1 - 5, 2014, Munich (Germany). pp. 1-4.

Valverde Alcalá, Juan and Rodríguez Medina, Alfonso and Mora de Sambricio, Javier and Castañares Franco, César and Portilla Berrueco, Jorge and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2014). A Dynamically Adaptable Image Processing Application Trading Off Between High Performance, Consumption and Dependability in Real Time. In: "2014 Conference on Design and Architectures for Signal and Image Processing (DASIP)", 08-10 oct 2014, Madrid (Spain). pp. 1-2.

Veljković, Filip and Riesgo Alcaide, Teresa and Torre Arnanz, Eduardo de la and Regada, Raúl and Berrojo, Luis (2014). A run time adaptive architecture to trade-off performance for fault tolerance applied to a DVB on-board processor. In: "2014 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)", 14/07/2014 17/07/2014, Leicester, United Kingdom. pp. 143-150. https://doi.org/10.1109/AHS.2014.6880170.

Veljković, Filip and Riesgo Alcaide, Teresa and Berrojo, Luis and Regada, Raúl and Álvaro Castellanos, Ángel de and Torre Arnanz, Eduardo de la (2014). Analysis of design alternatives on using dynamic and partial reconfiguration in a space application. In: "Data Systems in Aerospace (DASIA 2014)", 03/06/2014 - 05/06/2014, Warsaw, Poland. pp. 1-7.

Vázquez Antolín, Javier and López, Blanca and Valverde Alcalá, Juan and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2014). Collaborative Evolution Strategies on Evolvable Hardware Networked Elements. In: "2014 Conference on Design of Circuits and Integrated Circuits (DCIS)", 26-28 nov 2014, Madrid (Spain). pp. 1-5.

López, Blanca and Mora, Javier and Mansanet, Pablo and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2014). Development of Brain-Computer Interfaces using Evolvable Hardware. In: "2014 Conference on Design and Architectures for Signal and Image Processing (DASIP)", 08-10 oct 2014, Madrid (Spain). ISBN 979-10-92279-06-1. p. 1.

Rodríguez Medina, Alfonso and Valverde Alcalá, Juan and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2014). Dynamic management of multikernel multithread accelerators using dynamic partial reconfiguration. In: "9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC 2014)", 26/05/2014 - 28/05/2014, Montpellier, France. pp. 1-7. https://doi.org/10.1109/ReCoSoC.2014.6861363.

Quesada, E. and Maigler, M. Victoria and Barbado, A. and Valverde, J. and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2014). Environmental Wireless Sensor Network Deployment in Food Industry: from Theory to Practice. In: "XXIX Conference on Design of Circuits and Integrated Systems (DCIS 2014)", 26 - 28 Nov. 2014, Madrid (Spain). ISBN 978-1-4799-5743-9. pp. 1-4.

Diaz Lantada, Andres and Hernández Bayo, Araceli and Marquez Sevillano, Juan de Juanes and Martínez González, Sergio and Matía Espada, Fernando and Lumbreras Martin, Julio and Romero Olleros, Ignacio and Riesgo Alcaide, Teresa and Sánchez Naranjo, María Jesús and Pinto Cañón, Gabriel and Félez Mindán, Jesús (2014). Evolution and implementation of CDIO initiatives at ETSII-UPM. In: "2014 10th International CDIO Conference", 15/06/2014 - 19/06/2014, Barcelona. pp. 1-10.

Mora de Sambricio, Javier and Gallego Galán, Ángel and Otero, Andrés and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2014). Increased fault tolerance in evolvable hardware through automatic upscaling. In: "Conference on Design and Architectures for Signal and Image Processing (DASIP 2014)", 08/10/2014 - 10/10/2014, Madrid, Spain. p. 1.

Mujica Rojas, Gabriel Noe and Zamacola, Rafael and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2014). Performance evaluation of an AODV-Based routing protocol implementation by using a novel in-field WSN diagnosis tool. In: "Conference on Design of Circuits and Integrated Circuits (DCIS 2014)", 26/11/2014 - 28/11/2014, Madrid, Spain. pp. 1-6. https://doi.org/10.1109/DCIS.2014.7035607.

López, Blanca and Valverde Alcalá, Juan and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2014). Power-Aware Multi-Objective Evolvable Hardware System on an FPGA. In: "2014 NASA/ESA Conference on Adaptive Hardware and Systems", July 14 - 18, 2014, Leicester (United Kingdom). ISBN 978-1-4799-5356-1. pp. 61-68.

Mujica Rojas, Gabriel Noe and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2014). Testbed infrastructure for debugging, analyzing and optimizing WSN nodes based on a modular HW-SW architecture. In: "Jornadas de Computación Empotrada (JCE 2014)", 17/09/2014 - 19/09/2014, Valladolid, Spain. pp. 1-10.

Maigler, M. Victoria and Valverde Alcalá, Juan and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2013). Wireless Sensor Network Solution for Sustainable Food Production. In: "Seminario Anual de Automática, Electrónica Industrial e Instrumentación 2013 (SAAEI'13)", 10/07/2013 - 12/07/2013, Madrid (Spain). p. 5.

Vaskova, Anna and Portela-Garcia, Marta and Garcia-Valderas, Mario and Lopez-Ongil, Celia and Portilla Berrueco, Jorge and Valverde Alcalá, Juan and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2013). Hardening digital systems with distributed functionality: robust networks. In: "VLSI Circuits and Systems VI - SPIE Proceedings Microtechnologies 2013", 24/04/2013 - 26/04/2013, Grenoble (France).

Gallego Galán, Ángel and Mora de Sambricio, Javier and Otero Marnotes, Andres and Salvador Perea, Rubén and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2013). A novel FPGA-based evolvable hardware system based on multiple processing arrays. In: "2013 IEEE 27th International Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW)", 20/05/2013 - 21/05/2013, Cambridge, Massachusetts, EE.UU. pp. 182-191. https://doi.org/10.1109/IPDPSW.2013.56.

He, Danping and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2013). A 3D multi-objective optimization planning algorithm for wireless sensor networks. In: "39th Annual Conference of the IEEE Industrial Electronics Society (IECON 2013)", 10/11/2013 - 13/11/2013, Viena, Austria. pp. 5426-5431. https://doi.org/10.1109/IECON.2013.6700019.

Mujica Rojas, Gabriel Noe and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2013). A reliable support tool for monitoring, testing and debugging wireless sensor cookie nodes. In: "European Conference on Wireless Sensor Networks (EWSN)", 13/02/2013 - 15/02/2013, Ghent, Belgium. pp. 25-28.

Gallego Galán, Ángel and Mora de Sambricio, Javier and Otero Marnotes, Andres and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2013). A scalable evolvable hardware processing array. In: "Proceedings of International Conference on ReConFigurable Computing and FPGA (RECONFIG)", 09/12/2013 - 11/12/2013, Cancún (México). pp..

Gallego Galán, Ángel and Mora de Sambricio, Javier and Otero Marnotes, Andres and López, Blanca and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2013). A self-adaptive image processing application based on evolvable and scalable hardware. In: "23rd International Conference on Field Programmable Logic and Applications (FPL 2013)", 02/09/2013 - 04/09/2013, Porto, Portugal. pp.. https://doi.org/10.1109/FPL.2013.6645631.

Roselló Gómez-Lobo, Víctor Julián and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2013). Arquitectura de Radios Wake-up para redes de sensores inalámbricas basada en FPGA. In: "Actas del Seminario Anual de Automática, Electrónica Industrial e Instrumentación (SAAEI)", 10/07/2013 - 12/07/2013, Madrid, Spain. pp..

Mora de Sambricio, Javier and Gallego Galán, Ángel and Otero Marnotes, Andres and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2013). Noise-agnostic adaptive image filtering without training references on an evolvable hardware platform. In: "Conference on Design and Architectures for Signal and Image Processing (DASIP)", 08/10/2013 - 10/10/2013, Cagliari, Italy. pp..

Mujica Rojas, Gabriel Noe and Roselló Gómez-Lobo, Víctor Julián and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2013). On-the-fly dynamic reprogramming mechanism for increasing the energy efficiency and supporting multi-experimental capabilities in WSNs. In: "39th Annual Conference of the IEEE Industrial Electronics Society (IECON 2013)", 10/11/2013 - 13/11/2013, Vienna, Austria. pp. 5455-5460. https://doi.org/10.1109/IECON.2013.6700024.

He, Danping and Mujica Rojas, Gabriel Noe and Liang, Guixuan and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2013). Radio propagation modeling and measurements for ZigBee based indoor wireless sensor networks. In: "IV Jornadas de Computación Empotrada (JCE)", 17/09/2013 - 20/09/2013, Madrid, Spain. pp. 98-103.

Roselló Gómez-Lobo, Víctor Julián and Boyle, David and Portilla Berrueco, Jorge and O’Flynn, Brendan and Riesgo Alcaide, Teresa (2013). Route-back delivery protocol for collection tree protocol-based applications. In: "European Conference on Wireless Sensor Networks (EWSN)", 13/02/2013 - 15/02/2013, Ghent, Belgium. pp. 9-12.

Liang, Guixuan and He, Danping and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2012). Functional validation of MB-OFDM system using HW-in the loop. In: "27th Conference on Design of Circuits and Integrated Systems (DCIS)", 28/11/2012 - 30/11/2012, Avignon (France). pp. 131-136.

Liang, Guixuan and He, Danping and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2012). A hardware in the loop design methodology for FPGA system and its application to complex functions. In: "Proceedings of VLSI, Design, Automation and Test (VLSI-DAT)", 23/04/2012 - 25/04/2012, Hsinchu (Taiwan). ISBN 978-1-4577-2080-2. pp. 1-6.

He, Danping and Liang, Guixuan and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2012). A novel method for radio propagation simulation based on automatic 3D environment reconstruction. In: "6th European Conference on Antennas and Propagation (EuCAP)", 26/03/2012 - 30/03/2012, Prague (Czech Republic). ISBN 978-1-4577-0918-0. pp. 1-6.

He, Wei and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2012). An Interleaved EPE-Immune PA-DPL Structure for Resisting Concentrated EM Side Channel Attacks on FPGA Implementation. In: "Third International Workshop, COSADE 2012,", 03/05/2012 - 04/05/2012, Darmstadt, Alemania. ISBN 978-3-642-29911-7. pp. 39-53.

He, Wei and Otero Marnotes, Andres and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2012). Automatic Generation of Identical Routing Pairs for FPGA Implemented DPL Logic. In: "Proceedings of International Conference on ReConFigurable Computing and FPGAs (ReConFig)", 05/12/2012 - 07/12/2012, Cancun (Mexico). ISBN 978-1-4673-2919-4. pp. 1-6.

Mujica Rojas, Gabriel Noe and Roselló Gómez-Lobo, Víctor Julián and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2012). CookieLibs: An Intuitive Software Platform For Controlling Cookies Wireless Sensor Nodes. In: "27th Conference on Design of Circuits and Integrated Systems (DCIS)", 28/11/2012 - 30/11/2012, Avignon (France). pp. 502-503.

Otero Marnotes, Andres and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2012). Dreams: A tool for the design of dynamically reconfigurable embedded and modular systems. In: "Proceedings of International Conference on ReConFigurable Computing and FPGAs (ReConFig)", 05/12/2012 - 07/12/2012, Cancun (Mexico). pp. 1-8.

Mujica Rojas, Gabriel Noe and Roselló Gómez-Lobo, Víctor Julián and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2012). Hardware-software integration platform for a WSN testbed based on cookies nodes. In: "38th Annual Conference of the IEEE Industrial Electronics Society (IECON)", 25/11/2012 - 28/11/2012, Montreal (Canada). ISBN 978-1-4673-2419-9. pp. 6017-6022.

Salvador Perea, Rubén and Otero Marnotes, Andres and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa and Mora de Sambricio, Javier and Sekanina, Lukás (2012). Implementation techniques for evolvable HW systems: virtual vs. dynamic reconfiguration. In: "22nd International Conference on Field Programmable Logic and Applications (FPL2012)", 29/08/2012 - 31/08/2012, Oslo (Norway). ISBN 978-1-4673-2257-7. pp. 547-550.

Liang, Guixuan and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2012). Low-complexity timing synchronization scheme for MB-OFDM UWB receiver based on sign-bit. In: "Proceedings of International Conference on Ultra-Wideband (ICUWB)", 17/09/2012 - 20/09/2012, Syracuse, NY (USA). ISBN 978-1-4577-2031-4. pp. 1-6.

Lombardo, Miguel and Camarero, Julio and Valverde Alcalá, Juan and Portilla Berrueco, Jorge and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2012). Power management techniques in an FPGA-Based WSN node for high performance application. In: "7th International Workshop Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)", 09/07/2012 - 11/07/2012, York, United Kingdom. pp. 1-5.

He, Danping and Mujica Rojas, Gabriel Noe and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2012). Simulation Tool and Case Study for Planning Wireless Sensor Network. In: "Proceedings of 38th Annual Conference of the IEEE Industrial Electronics Society (IECON)", 25/10/2012 - 28/10/2012, Montreal (Canada). ISBN 978-1-4673-2419-9. pp. 6028-6032.

Yang, Jihoon and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2012). Smart parking service based on wireless sensor networks. In: "38th Annual Conference on IEEE Industrial Electronics Society (IECON)", 25/11/2012 - 28/11/2012, Montreal, Canada. pp. 6033-6038.

Roselló Gómez-Lobo, Víctor Julián and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2012). Wake-up architecture for Wireless sensor nodes based on ultra low power FPGA. In: "9th European Conference on Wireless Sensor Networks (EWSN 2012)", 15/02/2012 - 17/02/2012, Trento (Italia). pp. 1-2.

Cervero, Teresa and Otero Marnotes, Andres and López, S. and Torre Arnanz, Eduardo de la and Gallicó, G. and Sarmiento, Roberto and Riesgo Alcaide, Teresa (2011). A Novel Scalable Deblocking-Filter Architecture for H.264/AVC and SVC Video Codecs. In: "2011 IEEE International Conference on Multimedia and Expo (ICME)", 11/07/2011 - 15/07/2011, Barcelona, España. ISBN 978-1-61284-348-3. pp. 1-6.

Otero Marnotes, Andres and Salvador Perea, Rubén and Mora, Javier and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa and Sekanina, Lukás (2011). A Fast Reconfigurable 2D HW Core Architecture on FPGAs for Evolvable Self- Adaptive Systems. In: "2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)", 06/06/2011 - 09/06/2011, San Diego (California, USA). ISBN 978-1-4577-0598-4. pp. 336-343.

He, Wei and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2011). A Precharge-Absorbed DPL Logic for Reducing Early Propagation Effects on FPGA Implementations. In: "2011 International Conference on Reconfigurable Computing and FPGAs, RECONFIG '11", 30/11/2011 - 02/12/2011, Cancú, México. ISBN 978-0-7695-4551-6.

Salvador Perea, Rubén and Vidal, Alberto and Moreno González, Félix Antonio and Riesgo Alcaide, Teresa and Sekanina, Lukás (2011). Bio-inspired FPGA Architecture for Self-Calibration of an Image Compression Core based on Wavelet Transforms in Embedded Systems. In: "VLSI Circuits and Systems V", 18/04/2011 - 20/04/2011, Praga, República Checa. ISBN 9780819486561. pp. 1-13.

Otero Marnotes, Andres and Llinás, M. and Lombardo, Miguel and Portilla Berrueco, Jorge and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2011). Cost and energy efficient reconfigurable embedded platform using Spartan-6 FPGAs. In: "VLSI Circuits and Systems V", 18/04/2011 - 20/04/2011, Praga, República Checa. pp. 1-13.

Salvador Perea, Rubén and Otero Marnotes, Andres and Mora, Javier and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa and Sekanina, Lukás (2011). Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support. In: "2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)", 06/06/2011 - 09/06/2011, San Diego, CA, EEUU. ISBN 978-1-4577-0598-4. pp. 184-191.

Salvador Perea, Rubén and Otero Marnotes, Andres and Mora, Javier and Torre Arnanz, Eduardo de la and Sekanina, Lukás and Riesgo Alcaide, Teresa (2011). Fault Tolerance Analysis and Self-Healing Strategy of Autonomous, Evolvable Hardware Systems. In: "2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig)", 30/11/2011 - 02/12/2011, Cancú, México. ISBN 978-1-4577-1734-5. pp. 164-169.

Cervero, Teresa and Otero Marnotes, Andres and López, S. and Torre Arnanz, Eduardo de la and Gallicó, G. and Riesgo Alcaide, Teresa and Sarmiento, Roberto (2011). Framework adaptable y reconfigurable dinámicamente para procesamiento de vídeo: aplicación a la etapa de filtrado adaptativo en sistemas de compresión de vídeo H.264/AVC y SVC. In: "XI Jornadas de Computación Reconfigurable y Aplicaciones(JCRA) 2011", 07/09/2011 - 09/09/2011, La Laguna, Tenerife, España. ISBN 9788461488148. pp. 1-6.

Wei, Li and Portilla Berrueco, Jorge and Moreno González, Félix Antonio and Liang, Guixuan and Riesgo Alcaide, Teresa (2011). Improving target localization accuracy of wireless visual sensor networks. In: "IECON 2011 - 37th Annual Conference on IEEE Industrial Electronics Society", 07/11/2011 - 10/11/2011, Melbourne, Australia. ISBN 978-1-61284-969-0. pp. 1-8.

Liang, Guixuan and He, Danping and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2011). Low-power, high-speed FFT processor for MB-OFDM UWB application. In: "Microtechnologies for the New Millennium 2011 (SPIE)", 18/04/2011 - 22/04/2011, Praga, República Checa. pp. 1-13.

Otero Marnotes, Andres and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa and Cervero, Teresa and López, S. and Gallicó, G. and Sarmiento, Roberto (2011). Run-time Scalable Architecture for Deblocking Filtering in H.264/AVC-SVC Video Codecs. In: "21st International Conference on Field Programmable Logic and Applications", 05/09/2011 - 07/09/2011, Creta, Grecia. ISBN 978-1-4577-1484-9. pp. 1-6.

He, Wei and Pizarro, Carlos and Torre Arnanz, Eduardo de la and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2011). SCA security verification on wireless sensor network node. In: "Microtechnologies for the New Millennium 2011 (SPIE)", 18/04/2011 - 22/04/2011, Praga, República Checa. pp. 1-15.

Roselló Gómez-Lobo, Víctor Julián and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2011). Ultra Low Power FPGA-Based Architecture for Wake-up Radio in Wireless Sensor Networks. In: "37th Annual Conference of the IEEE Industrial Electronics Society", 07/11/2011 - 10/11/2011, Melbourne, Australia. ISBN 978-1-61284-969-0.

Roselló Gómez-Lobo, Víctor Julián and Portilla Berrueco, Jorge and Riesgo Alcaide, Teresa (2011). Wake up Radio Architecture for Wireless Sensor Networks Using an Ultra Low Power FPGA. In: "DCIS 2011 26th Confenrence on Design of Circuits and Integrated Systems", 16/11/2011 - 18/11/2011, Albufeira, Portugal.

Salvador Perea, Rubén and Moreno González, Félix Antonio and Riesgo Alcaide, Teresa and Sekanina, Lukás (2010). High level validation of an optimization algorithm for the implementation of adaptive Wavelet Transforms in FPGAs. In: "13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2010", 01/09/2010 - 03/09/2010, Lille, Francia. ISBN 978-0-7695-4171-6.

Roselló Gómez-Lobo, Víctor Julián and Portilla Berrueco, Jorge and Esteves Krasteva, Yana and Riesgo Alcaide, Teresa (2010). Wireless Sensor Network Modular Node Modeling and Simulation with VisualSense. In: "35th Annual Conference of the IEEE Industrial Electronics Society, IECON'09", 03/11/2009 - 05/11/2009, Oporto, Portugal. ISBN 978-1-4244-4648-3.

Otero Marnotes, Andres and Morales Cas, Angel and Portilla Berrueco, Jorge and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2010). A Modular Peripheral to Support Self-Reconfiguration in SoCs. In: "13th Euromicro Conference On Digital System Desig (DSD)", 01/09/2010 - 03/09/2010, Lille, Francia.

Salvador Perea, Rubén and Moreno González, Félix Antonio and Riesgo Alcaide, Teresa and Sekanina, Lukás (2010). Evolutionary design and optimization of Wavelet Transforms for image compression in embedded systems. In: "IEEE NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2010", 15/07/2010 - 18/07/2010, California, USA. ISBN 978-1-4244-5887-5.

Otero Marnotes, Andres and Esteves Krasteva, Yana and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2010). Generic Systolic Array for Run-time Scalable Cores. In: "6th International Symposium on Applied Reconfigurable Computing (ARC)", 17/03/2010 - 19/03/2010, Bangkok, Tailandia. ISBN 978-3-642-12132-6.

Salvador Perea, Rubén and Moreno González, Félix Antonio and Riesgo Alcaide, Teresa and Sekanina, Lukás (2010). Implementation of bio-inspired adaptive wavelet transforms in FPGAs. Modeling, validation and profiling of the algorithm. In: "XXV Conference on Design of Circuits and Integrated Systems, 2010 (DCIS)", 17/11/2010 - 19/11/2010, Lanzarote, Canarias, España.

Otero Marnotes, Andres and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa and Esteves Krasteva, Yana (2010). Run-time Scalable Systolic Coprocessors for Flexible Multimedia SoPCs. In: "2010 International Conference Field Programmable Logic and Applications (FPL)", 31/08/2010 - 02/09/2010, Milán, Italia. ISBN 978-1-4244-7842-2.

Portilla Berrueco, Jorge and Valverde Alcalá, Juan and Riesgo Alcaide, Teresa (2010). Wireless Sensor Network Application for Environmental Impact Analysis and Control. In: "25th Conference on Design of Circuits and Integrated Systems 2010, DCIS 2010", 17/11/2010 - 19/11/2010, Lanzarote, Canarias, España.

Steffen, Peter and Oliver, Stecklina and Portilla Berrueco, Jorge and Torre Arnanz, Eduardo de la and Langendörfer, Peter and Riesgo Alcaide, Teresa (2009). Reconfiguring Crypto Hardware Accelerators on Wireless Sensor Nodes. In: "6th Annual IEEE Communications Society Conference on Sensor, Mesh and Ad Hoc Communications and Networks Workshops, 2009. SECON Workshops '09", 22/06/2009 - 26/06/2009, Roma, Italia. ISBN 978-1-4244-3938-6.

Salvador Perea, Rubén and Terleira, Carlos and Moreno González, Félix Antonio and Riesgo Alcaide, Teresa (2009). Approach to an FPGA embedded, autonomous object recognition system: run-time learning and adaptation. In: "VLSI Circuits and Systems IV", 04/05/2009 - 06/05/2009, Dresden, Alemania. ISBN 9780819476371.

Vladimir, Matev and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2009). Method for run time hardware code profiling for algorithm acceleration. In: "VLSI Circuits and Systems IV", 01/05/2009 - 03/05/2009, Dresden, Alemania. ISBN 9780819476371.

Machado Sánchez, Felipe and Torroja Fungairiño, Yago and Riesgo Alcaide, Teresa (2009). A BDD proposal for Probabilistic Switching Activity Estimation. In: "International Conference on Design of Circuits and Integrated Systems (DCIS)", 12/11/2008-14/11/2008, Grenobel, Francia. ISBN 978-2-84813-124-5.

Machado Sánchez, Felipe and Riesgo Alcaide, Teresa and Torroja Fungairiño, Yago (2009). Disjoint Region Partitioning for Probabilistic Switching Activity Estimation at Register Transfer Level. In: "18th International Workshop on Power and Timing Modeling, Optimization and Simulation", 10/09/2008-12/09/2008, Lisboa (Portugal). ISBN 978-3-540-95947-2. pp..

Esteves Krasteva, Yana and Criado, Francisco and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2009). NoC Emulation based on Partial Reconfiguration. In: "XXIII International Conference on Design of Circuits and Integrated Systems (DCIS'2008)", 12/11/2008-14/11/2008, Grenoble, Francia. ISBN 978-28-4813-124-5. p. 36.

Ladis, E. and Papaefstathio, I. and Marchesani, R. and Tuinenbreijer, K. and Langendörfer, Peter and Zahariadis, Theodore and Leligou, H.C. and Redondo, L. and Riesgo Alcaide, Teresa and Kannegiesser, P. and Berekovic, M. and Van Rijn, C.J.M. (2009). Secure, Mobile Visual Sensor Networks Architecture. In: "Sensor, Mesh and Ad Hoc Communications and Networks Workshops", 22/06/2009 - 26/06/2009, Roma, Italy. ISBN 978-1-4244-3938-6.

Portilla Berrueco, Jorge and Esteves Krasteva, Yana and Carnicer, Jose María and Riesgo Alcaide, Teresa (2009). Wireless Sensor Networks Node with Remote HW/SW Reconfiguration Capabilities. In: "23rd Conference on Design of Circuits and Integrated Systems, DCIS 2008", 12/11/2008-14/11/2008, Granoble, Francia. ISBN 978-28-4813-124-5.

Esteves Krasteva, Yana and Criado, Francisco and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2008). A Fast Emulation-Based NoC Prototyping Framework. In: "International Conference on ReConFigurable Computing and FPGAs (ReConFig'08)", 03/12/2008-05/12/2008, Cancún, México. ISBN 978-1-4244-3748-1. pp. 211-216.

Moreno González, Félix Antonio and Alarcón Celis, Jaime and Salvador Perea, Rubén and Riesgo Alcaide, Teresa (2008). FPGA implementation of an image recognition system based on tiny neural networks and on-line reconfiguration. In: "34th Annual Conference of the IEEE Industrial Electronics Society.IECON-2008", 10/11/2008-13/11/2008, Orlando (Florida, USA). ISBN 978-14-2441-668-4. pp. 2445-2452.

Esteves Krasteva, Yana and Portilla Berrueco, Jorge and Carnicer, Jose María and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2008). Remote HW-SW Reconfigurable Wireless Sensor Nodes. In: "34th Annual Conference of the IEEE Industrial Electronics Society. IECON-2008", 10/11/2008-13/11/2008, Orlando, Florida, USA. ISBN 978-14-2441-766-7. pp..

Esteves Krasteva, Yana and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2008). Virtual Architectures for Partial Runtime Reconfigurable Systems. Application to Network on Chip based SoC Emulation. In: "34th Annual Conference of the IEEE Industrial Electronics Society. IECON-2008", 10/11/2008-13/11/2008, Orlando, Florida, USA. ISBN 978-1-4244-1766-7. pp..

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