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Gomez Osuna, Carlos and Sánchez Marcos, Miguel Ángel and Ituero Herrero, Pablo and López Vallejo, Marisa (2012). A Monitoring Infrastructure for FPGA Self-Awareness and Dynamic Adaptation. In: "19th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2012", 10/12/2012 - 13/12/2012, Sevilla. ISBN 978-1-4673-1259-2. pp. 765-768. https://doi.org/10.1109/ICECS.2012.6463547.
Title: | A Monitoring Infrastructure for FPGA Self-Awareness and Dynamic Adaptation |
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Author/s: |
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Item Type: | Presentation at Congress or Conference (Article) |
Event Title: | 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2012 |
Event Dates: | 10/12/2012 - 13/12/2012 |
Event Location: | Sevilla |
Title of Book: | Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2012 |
Date: | December 2012 |
ISBN: | 978-1-4673-1259-2 |
Subjects: | |
Freetext Keywords: | CMOS, FPGA, Monitoring, On-Chip, aging, dynamic adaptation leakage, temperature, variability |
Faculty: | E.T.S.I. Telecomunicación (UPM) |
Department: | Ingeniería Electrónica |
Creative Commons Licenses: | Recognition - No derivative works - Non commercial |
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Variabilities associated with CMOS evolution affect the yield and performance of current digital designs. FPGAs, which are widely used for fast prototyping and implementation of digital circuits, also suffer from these issues. Proactive approaches start to appear to achieve self-awareness and dynamic adaptation of these devices. To support these techniques we propose the employment of a multi-purpose sensor network. This infrastructure, through adequate use of configuration and automation tools, is able to obtain relevant data along the life cycle of an FPGA. This is realised at a very reduced cost, not only in terms of area or other limited resources, but also regarding the design effort required to define and deploy the measuring infrastructure. Our proposal has been validated by measuring inter-die and intra-die variability in different FPGA families.
Item ID: | 20500 |
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DC Identifier: | https://oa.upm.es/20500/ |
OAI Identifier: | oai:oa.upm.es:20500 |
DOI: | 10.1109/ICECS.2012.6463547 |
Official URL: | http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6463547 |
Deposited by: | Memoria Investigacion |
Deposited on: | 07 Oct 2013 16:05 |
Last Modified: | 21 Apr 2016 23:20 |