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Hardware Reuse Improvement through the Domain Specific Language dHDL.
Citation
Sánchez Marcos, Miguel Ángel and López Vallejo, Marisa and Iglesias Fernandez, Carlos Angel (2012). Hardware Reuse Improvement through the Domain Specific Language dHDL.. In: "10th International Symposium on Parallel and Distributed Processing with Applications (ISPA), 2012 IEEE", 10/07/2012 - 13/07/2012, Madrid. ISBN 978-1-4673-1631-6. pp. 857-858. https://doi.org/10.1109/ISPA.2012.133.
Description
| Title: | Hardware Reuse Improvement through the Domain Specific Language dHDL. |
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| Author/s: |
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| Item Type: | Presentation at Congress or Conference (Article) |
| Event Title: | 10th International Symposium on Parallel and Distributed Processing with Applications (ISPA), 2012 IEEE |
| Event Dates: | 10/07/2012 - 13/07/2012 |
| Event Location: | Madrid |
| Title of Book: | 10th International Symposium on Parallel and Distributed Processing with Applications (ISPA), 2012 IEEE |
| Date: | 2012 |
| ISBN: | 978-1-4673-1631-6 |
| Subjects: | |
| Freetext Keywords: | Assembly, Distributed processing, Hardware, Hardware design languages, Libraries, Productivity, Space exploration |
| Faculty: | E.T.S.I. Telecomunicación (UPM) |
| Department: | Ingeniería Electrónica |
| Creative Commons Licenses: | Recognition - No derivative works - Non commercial |
Abstract
The dHDL language has been defined to improve hardware design productivity. This is achieved through the definition of a better reuse interface (including parameters, attributes and macroports) and the creation of control structures that help the designer in the hardware generation process.
More information
| Item ID: | 20504 |
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| DC Identifier: | https://oa.upm.es/20504/ |
| OAI Identifier: | oai:oa.upm.es:20504 |
| DOI: | 10.1109/ISPA.2012.133 |
| Official URL: | http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6280394 |
| Deposited by: | Memoria Investigacion |
| Deposited on: | 07 Oct 2013 17:24 |
| Last Modified: | 21 Apr 2016 23:21 |
