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A DVS system based on the trade-off between energy savings and execution time
Citation
Vasic, Miroslav 
ORCID: https://orcid.org/0000-0001-9597-6409, García Suárez, Oscar ORCID: https://orcid.org/0000-0001-6042-3855, Oliver Ramírez, Jesús Angel ORCID: https://orcid.org/0000-0002-5286-5378, Alou Cervera, Pedro ORCID: https://orcid.org/0000-0002-2985-1330 and Cobos Márquez, José Antonio ORCID: https://orcid.org/0000-0003-4542-2656
(2008).
A DVS system based on the trade-off between energy savings and execution time.
In: "11th Workshop on Control and Modeling for Power Electronics (COMPEL 2008)", 17/08/2008-20/08/2008, Zurich, Suiza. ISBN 978-1-4244-2550-1. pp..
https://doi.org/10.1109/COMPEL.2008.4634665.
Description
| Title: | A DVS system based on the trade-off between energy savings and execution time |
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| Author/s: |
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| Item Type: | Presentation at Congress or Conference (Article) |
| Event Title: | 11th Workshop on Control and Modeling for Power Electronics (COMPEL 2008) |
| Event Dates: | 17/08/2008-20/08/2008 |
| Event Location: | Zurich, Suiza |
| Title of Book: | Proceedings of 11th Workshop on Control and Modeling for Power Electronics (COMPEL 2008) |
| Date: | September 2008 |
| ISBN: | 978-1-4244-2550-1 |
| Subjects: | |
| Faculty: | E.T.S.I. Industriales (UPM) |
| Department: | Automática, Ingeniería Electrónica e Informática Industrial [hasta 2014] |
| Creative Commons Licenses: | Recognition - No derivative works - Non commercial |
Abstract
DVS (Dynamic Voltage Scaling) is a technique used for reducing the power consumption of digital circuits. The power consumed by these circuits has a main component (dynamic power) that is proportional to the square of the supply voltage. Additionally, for every supply voltage, there is a maximum value of the clock frequency. The advantage of using DVS is that the supply voltage (and hence clock frequency) can be adjusted depending on the specific needs during execution. The DVS concept has been used in some commercial products like Transmeta’s Crusoe [1], Intel Speed Step [2], AMD K6 [3], Hitachi SH4 [4], etc. This paper presents results obtained by using a DVS algorithm based on the workload estimation and trade-off between the execution time and power savings. It is discussed about influence of the power supply’s slew rate, algorithms influence on the system performance and problems to estimate the processors workload. The DVS system is realized on Intel’s PXA255 platform and energy savings have been calculated by measuring directly voltages and currents on the platform.
More information
| Item ID: | 3344 |
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| DC Identifier: | https://oa.upm.es/3344/ |
| OAI Identifier: | oai:oa.upm.es:3344 |
| DOI: | 10.1109/COMPEL.2008.4634665 |
| Official URL: | http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumb... |
| Deposited by: | Memoria Investigacion |
| Deposited on: | 25 Mar 2011 09:31 |
| Last Modified: | 20 Apr 2016 12:53 |
