Full text
Preview |
PDF
- Requires a PDF viewer, such as GSview, Xpdf or Adobe Acrobat Reader
Download (3MB) | Preview |
Cortés González, Jorge, Svikovic, Vladimir, Alou Cervera, Pedro ORCID: https://orcid.org/0000-0002-2985-1330, Oliver Ramírez, Jesús Angel
ORCID: https://orcid.org/0000-0002-5286-5378 and Cobos Marquez, Jose Antonio
ORCID: https://orcid.org/0000-0003-4542-2656
(2014).
An optimization algorithm to design fast and robust analog controls for Buck converters.
In: "15th Workshop on Control and Modeling for Power Electronics (COMPEL 2014)", 22/06/2014 - 25/06/2014, Santander, Spain. pp. 1-10.
https://doi.org/10.1109/COMPEL.2014.6877166.
Title: | An optimization algorithm to design fast and robust analog controls for Buck converters |
---|---|
Author/s: |
|
Item Type: | Presentation at Congress or Conference (Article) |
Event Title: | 15th Workshop on Control and Modeling for Power Electronics (COMPEL 2014) |
Event Dates: | 22/06/2014 - 25/06/2014 |
Event Location: | Santander, Spain |
Title of Book: | 15th Workshop on Control and Modeling for Power Electronics (COMPEL 2014) |
Date: | 2014 |
Subjects: | |
Freetext Keywords: | Control of DC/DC converters, fast, robustness, voltage mode, v2, v2ic, optimization |
Faculty: | Centro de Electrónica Industrial (CEI) (UPM) |
Department: | Automática, Ingeniería Eléctrica y Electrónica e Informática Industrial |
Creative Commons Licenses: | Recognition - No derivative works - Non commercial |
Preview |
PDF
- Requires a PDF viewer, such as GSview, Xpdf or Adobe Acrobat Reader
Download (3MB) | Preview |
Ripple-based controls are popular to achieve a fast dynamic response, but the design of these controls assuring robustness is not easy due to its intrinsic nonlinear nature. These techniques often rely on sensing networks heavily dependent on parasitic elements to estimate the inductor current or the capacitor current. Consequently, a modeling technique that takes into account these sensors and parasitic elements is needed. This paper proposes an optimization algorithm to design a wide variety of controls that can take into account the parasitic elements and tolerances of the converter. The proposed algorithm can be used to design very fast controls that are also robust in a real-world implementation. This algorithm is verified on a 300kHz Buck converter with Voltage mode and a 1.3MHz Buck converter with V2Ic control.
Item ID: | 36309 |
---|---|
DC Identifier: | https://oa.upm.es/36309/ |
OAI Identifier: | oai:oa.upm.es:36309 |
DOI: | 10.1109/COMPEL.2014.6877166 |
Official URL: | http://ieeexplore.ieee.org/document/6877166/ |
Deposited by: | Memoria Investigacion |
Deposited on: | 28 Mar 2017 16:54 |
Last Modified: | 28 Mar 2017 16:54 |