Multiphase current controlled buck converter with energy recycling Output Impedance Correction Circuit (OICC): Adaptive Voltage Positioning (AVP) and Dynamic Voltage Scaling (DVS) application

Svikovic, Vladimir and Cortés González, Jorge and Alou Cervera, Pedro and Oliver Ramírez, Jesús Angel and García, O. and Cobos Marquez, Jose Antonio (2015). Multiphase current controlled buck converter with energy recycling Output Impedance Correction Circuit (OICC): Adaptive Voltage Positioning (AVP) and Dynamic Voltage Scaling (DVS) application. In: "IEEE Applied Power Electronics Conference and Exposition (APEC 2015)", 15/03/2015 - 19/03/2015, Charlotte, North Caroline, USA). pp. 2877-2884. https://doi.org/10.1109/APEC.2015.7104759.

Description

Title: Multiphase current controlled buck converter with energy recycling Output Impedance Correction Circuit (OICC): Adaptive Voltage Positioning (AVP) and Dynamic Voltage Scaling (DVS) application
Author/s:
  • Svikovic, Vladimir
  • Cortés González, Jorge
  • Alou Cervera, Pedro
  • Oliver Ramírez, Jesús Angel
  • García, O.
  • Cobos Marquez, Jose Antonio
Item Type: Presentation at Congress or Conference (Article)
Event Title: IEEE Applied Power Electronics Conference and Exposition (APEC 2015)
Event Dates: 15/03/2015 - 19/03/2015
Event Location: Charlotte, North Caroline, USA)
Title of Book: IEEE Applied Power Electronics Conference and Exposition (APEC 2015)
Date: 2015
Subjects:
Freetext Keywords: Component; formatting; style; styling; insert (key words
Faculty: Centro de Electrónica Industrial (CEI) (UPM)
Department: Automática, Ingeniería Eléctrica y Electrónica e Informática Industrial
Creative Commons Licenses: Recognition - No derivative works - Non commercial

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Abstract

Modern microprocessors impose strict specifications on Voltage Regulating Modules (VRMs) with advanced features such as Dynamic Voltage Scaling (DVS) and Adaptive Voltage Positioning (AVP). In this study the Output Impedance Correction Circuit (OICC) concept is employed as an additional energy path in a Multiphase synchronous buck converter in a manner that, during the load steps transients, the output capacitor of 150 μF is virtually increased to 2.1 mF, thus improving the response under AVP operation. On the other hand, during the output voltage reference step, the OICC is inactive, facilitating DVS operation and reducing the current stress on the switches and the inductors. Furthermore, the proposed solution is compared with a reference converter with 2.1 mF output capacitor, for both AVP and DVS operations. The OICC is implemented as a Synchronous Buck Converter with Peak Current Mode Control (PCMC), having smaller penalty on the system efficiency comparing with Linear Regulator (LR) implementation.

Funding Projects

Type
Code
Acronym
Leader
Title
FP7
318529.
PowerSwipe
UNIVERSITY COLLEGE CORK, NATIONAL UNIVERSITY OF IRELAND, CORK
POWER SoC With Integrated PassivEs

More information

Item ID: 42591
DC Identifier: https://oa.upm.es/42591/
OAI Identifier: oai:oa.upm.es:42591
DOI: 10.1109/APEC.2015.7104759
Official URL: http://ieeexplore.ieee.org/document/7104759/
Deposited by: Memoria Investigacion
Deposited on: 22 Apr 2017 08:48
Last Modified: 22 Apr 2017 08:48
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