Reconfigurable writing architecture for reliable RRAM operation in wide temperature ranges

García Redondo, Fernando, Royer del Barrio, Pablo, López Vallejo, Marisa, Aparicio Cerqueira, Hernán, Ituero Herrero, Pablo ORCID: https://orcid.org/0000-0001-6448-7936 and López Barrio, Carlos Alberto ORCID: https://orcid.org/0000-0002-2423-5272 (2016). Reconfigurable writing architecture for reliable RRAM operation in wide temperature ranges. "IEEE Transactions on very large scale integration (VLSI) Systems", v. 25 (n. 4); pp. 1224-1235. ISSN 1557-9999. https://doi.org/10.1109/TVLSI.2016.2634083.

Description

Title: Reconfigurable writing architecture for reliable RRAM operation in wide temperature ranges
Author/s:
  • García Redondo, Fernando
  • Royer del Barrio, Pablo
  • López Vallejo, Marisa
  • Aparicio Cerqueira, Hernán
  • Ituero Herrero, Pablo https://orcid.org/0000-0001-6448-7936
  • López Barrio, Carlos Alberto https://orcid.org/0000-0002-2423-5272
Item Type: Article
Título de Revista/Publicación: IEEE Transactions on very large scale integration (VLSI) Systems
Date: 19 December 2016
ISSN: 1557-9999
Volume: 25
Subjects:
Freetext Keywords: Writing, Switches, Power demand, Temperature distribution,Integrated circuit reliability
Faculty: E.T.S.I. Telecomunicación (UPM)
Department: Ingeniería Electrónica
Creative Commons Licenses: Recognition - No derivative works - Non commercial

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Abstract

Resistive switching memories [resistive RAM (RRAM)] are an attractive alternative to nonvolatile storage and nonconventional computing systems, but their behavior strongly depends on the cell features, driver circuit, and working conditions. In particular, the circuit temperature and writing voltage schemes become critical issues, determining resistive switching memories performance. These dependencies usually force a design time tradeoff among reliability, device endurance, and power consumption, thereby imposing nonflexible functioning schemes and limiting the system performance. In this paper, we present a writing architecture that ensures the correct operation no matter the working temperature and allows the dynamic load of application-oriented writing profiles. Thus, taking advantage of more efficient configurations, the system can be dynamically adapted to overcome RRAM intrinsic challenges. Several profiles are analyzed regarding power consumption, temperature-variations protection, and operation speed, showing speedups near 700x compared with other published drivers.

Funding Projects

Type
Code
Acronym
Leader
Title
Government of Spain
TEC2012-31292
TOLERA
Unspecified
Tolerancia a variaciones PVT y radiación en tecnologías nanométricas
Government of Spain
TEC2015-65902
TOLERA2
Unspecified
Unspecified

More information

Item ID: 45494
DC Identifier: https://oa.upm.es/45494/
OAI Identifier: oai:oa.upm.es:45494
DOI: 10.1109/TVLSI.2016.2634083
Official URL: http://ieeexplore.ieee.org/document/7790903/
Deposited by: Memoria Investigacion
Deposited on: 07 May 2017 10:05
Last Modified: 19 Mar 2019 14:22
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