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Suriano, Leonardo ORCID: https://orcid.org/0000-0002-3206-117X, Madroñal Quintín, Daniel
ORCID: https://orcid.org/0000-0001-5994-7440, Rodriguez, Alfonso, Juarez, Eduardo, Sanz, Cesar and Torre Arnanz, Eduardo de la
ORCID: https://orcid.org/0000-0001-5697-0573
(2018).
A Unified Hardware/Software Monitoring Method for Reconfigurable Computing Architectures using PAPI.
In: "2018 13rd International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)", 9-11 Julio, Lille, France.
Title: | A Unified Hardware/Software Monitoring Method for Reconfigurable Computing Architectures using PAPI |
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Author/s: |
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Item Type: | Presentation at Congress or Conference (Article) |
Event Title: | 2018 13rd International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) |
Event Dates: | 9-11 Julio |
Event Location: | Lille, France |
Title of Book: | 13rd International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) |
Date: | 11 July 2018 |
Subjects: | |
Faculty: | Centro de Electrónica Industrial (CEI) (UPM) |
Department: | Automática, Ingeniería Eléctrica y Electrónica e Informática Industrial |
Creative Commons Licenses: | None |
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In this work, a standard and unified method for monitoring hardware accelerators in Reconfigurable Computing Architectures is proposed, based on a standard software monitoring interface.
The open source Performance Application Programming Interface (PAPI) library is commonly used in the field of High Performance Computing and aims at providing event information directly extracted from a set of Performance Monitor Counters. Important events such as data and instruction cache misses, hardware interrupts, etc. are collected to analyze and profile applications to pinpoint the contingent bottlenecks. In other words, it serves as a ”Hardware Abstraction layer” for applications running in the user-space.
In this paper, its use is extended by proposing a method to target custom Performance Hardware Registers on accelerators built upon an FPGA. Furthermore, portability and standardization are discussed and the overhead associated with PAPI use is evaluated. Two hardware examples are proposed to evaluate this approach: a simple counter and an infrastructure for hardware accelerators called ARTICo3.
Item ID: | 51783 |
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DC Identifier: | https://oa.upm.es/51783/ |
OAI Identifier: | oai:oa.upm.es:51783 |
Deposited by: | Alfonso Rodríguez Medina |
Deposited on: | 03 Sep 2018 11:37 |
Last Modified: | 17 Nov 2020 11:02 |