A Systematic Process for Implementing Gateways for Test Tools

Díaz Fernández, Jessica and Yagüe Panadero, Agustín and Garbajosa Sopeña, Juan (2009). A Systematic Process for Implementing Gateways for Test Tools. In: "16th Annual IEEE International Conference and Workshop on the Engineering of Computer Based Systems", 14/04/2009 - 16/04/2009, San Francisco, California, USA. ISBN 978-0-7695-3602-6.

Description

Title: A Systematic Process for Implementing Gateways for Test Tools
Author/s:
  • Díaz Fernández, Jessica
  • Yagüe Panadero, Agustín
  • Garbajosa Sopeña, Juan
Item Type: Presentation at Congress or Conference (Article)
Event Title: 16th Annual IEEE International Conference and Workshop on the Engineering of Computer Based Systems
Event Dates: 14/04/2009 - 16/04/2009
Event Location: San Francisco, California, USA
Title of Book: Proceedings of 16th Annual IEEE International Conference and Workshop on the Engineering of Computer Based Systems
Date: 2009
ISBN: 978-0-7695-3602-6
Subjects:
Faculty: E.U. de Informática (UPM)
Department: Organización y Estructura de la Información [hasta 2014]
Creative Commons Licenses: Recognition - No derivative works - Non commercial

Full text

[thumbnail of INVE_MEM_2009_69945.pdf]
Preview
PDF - Requires a PDF viewer, such as GSview, Xpdf or Adobe Acrobat Reader
Download (856kB) | Preview

Abstract

Test automation is facing a new challenge because tools, as well as having to provide conventional test functionalities, must be capable to interact with ever more heterogeneous complex systems under test (SUT). The number of existing software interfaces to access these systems is also a growing number. The problem cannot be analyzed only from a technical or engineering perspective; the economic perspective is as important. This paper presents a process to systematically implement gateways which support the communication between test tools and SUTs with a reduced cost. The proposed solution does not preclude any interface protocol at the SUT side. This process is supported using a generic architecture of a gateway defined on top of OSGi. Any test tool can communicate with the gateway through a unique defined interface. To communicate the gateway and the SUT, basically, the driver corresponding to the SUT software interface has to be loaded.

More information

Item ID: 5627
DC Identifier: https://oa.upm.es/5627/
OAI Identifier: oai:oa.upm.es:5627
Official URL: http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumb...
Deposited by: Memoria Investigacion
Deposited on: 17 Jan 2011 08:39
Last Modified: 20 Apr 2016 14:23
  • Logo InvestigaM (UPM)
  • Logo GEOUP4
  • Logo Open Access
  • Open Access
  • Logo Sherpa/Romeo
    Check whether the anglo-saxon journal in which you have published an article allows you to also publish it under open access.
  • Logo Dulcinea
    Check whether the spanish journal in which you have published an article allows you to also publish it under open access.
  • Logo de Recolecta
  • Logo del Observatorio I+D+i UPM
  • Logo de OpenCourseWare UPM