?url_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Adc&rft.title=Entorno+de+test+para+la+tarjeta+de+control+del+equipo+de+medici%C3%B3n+de+distancias+de+Indra+Sistemas&rft.creator=Cano+Moya%2C+Alejandro&rft.contributor=Ju%C3%A1rez+Mart%C3%ADnez%2C+Eduardo&rft.contributor=Bravo+Barahona%2C+Pedro&rft.subject=Aeronautics&rft.subject=Telecommunications&rft.description=En+este+documento+se+propone+el+dise%C3%B1o+de+un+entorno+de+test+para+una+tarjeta+de+control+o+%E2%80%9Ccontrol+board%E2%80%9D%2C+que+se+compondr%C3%A1+de+una+placa+de+test+y+del+c%C3%B3digo+VHDL+que+se+sintetizar%C3%A1+para+ser+volcado+en+la+FPGA+de+la+control+board.+Dado+que+en+una+multinacional+el+tiempo+es+dinero%2C+cualquier+mejora+de+producto+que+le+permita+detectar+fallos+superficiales+autom%C3%A1ticamente+hace+que+se+ahorre+todo+el+tiempo+y+recursos+que+requerir%C3%ADa+la+exploraci%C3%B3n+directa+a+las+partes+concretas+del+producto.+Por+ello%2C+el+planteamiento+de+un+dise%C3%B1o+de+una+placa+de+test+que+autom%C3%A1ticamente+detecte+fallos+de+los+componentes+m%C3%A1s+importantes+de+una+control+board+supondr%C3%ADa+un+enorme+ahorro.+Como+la+placa+de+testeo+para+la+control+board+ha+de+ser+lo+menos+costosa+posible%2C+se+aprovechar%C3%A1n+todas+las+funciones+posibles+de+la+control+board%2C+por+lo+que+el+planteamiento+inicial+de+la+placa+de+test+ser%C3%A1+la+de+una+placa+que%2C+re-direccionando+las+distintas+entradas+y+salidas+de+la+control+board+le+permita+una+autocomprobaci%C3%B3n+de+sus+distintas+partes.+Este+trabajo+de+fin+de+grado+concluir%C3%A1+con+el+dise%C3%B1o+a+nivel+de+diagrama+de+bloques+de+la+placa+de+test%2C+el+desarrollo+del+c%C3%B3digo+VHDL+completo+que+una+vez+sintetizado+se+volcar%C3%A1+a+la+FPGA+que+contiene+la+control+board+y+la+simulaci%C3%B3n+de+la+respuesta+del+producto+final+en+una+prueba+real.%0D%0AAbstract%3A%0D%0AIn+this+document%2C+we+are+going+to+propose+the+design+of+a+test+environment+for+a+control+board%2C+which+will+consist+of+a+test+board+and+the+VHDL+code+that+will+be+synthesized+and+programmed+into+the+FPGA+control+board.+Given+the+fact+that+in+a+multinational+time+is+money%2C+any+product+improvement+that+allows+detecting+surface+failures+automatically+saves+all+the+time+and+resources+that+a+deeper+exploration+of+the+specific+parts+of+the+product+would+require.+Therefore%2C+the+approach+of+designing+a+test+board+that+automatically+detects+failures+of+the+most+important+components+of+a+control+board+would+be+a+huge+saving.+As+the+test+board+for+the+control+board+has+to+be+as+inexpensive+as+possible%2C+all+the+possible+functions+of+the+control+board+will+be+used%2C+so+the+initial+approach+of+the+test+board+will+be+that%2C+redirecting+the+different+inputs+and+outputs+of+the+control+board%2C+allow+a+self-test+of+its+different+parts.+This+end-of-degree+project+will+conclude+with+the+design+of+the+block+diagram+of+the+test+board%2C+the+complete+VHDL+code+that+will+be+downloaded+after+synthesis+to+the+FPGA+contained+in+the+control+board+and+the+simulation+of+the+response+of+the+final+product+in+a+real+test.&rft.publisher=E.T.S.I+y+Sistemas+de+Telecomunicaci%C3%83%C2%B3n+(UPM)&rft.rights=https%3A%2F%2Fcreativecommons.org%2Flicenses%2Fby-nc-nd%2F3.0%2Fes%2F&rft.date=2019-06&rft.type=info%3Aeu-repo%2Fsemantics%2FbachelorThesis&rft.type=Final+Project&rft.type=PeerReviewed&rft.format=application%2Fpdf&rft.language=spa&rft.format=application%2Fzip&rft.language=spa&rft.rights=info%3Aeu-repo%2Fsemantics%2FrestrictedAccess&rft.identifier=https%3A%2F%2Foa.upm.es%2F63440%2F