Items where author is "Esteves Krasteva, Yana"

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Number of items: 10.

Presentation at Congress or Conference

Roselló Gómez-Lobo, Víctor Julián and Portilla Berrueco, Jorge and Esteves Krasteva, Yana and Riesgo Alcaide, Teresa (2010). Wireless Sensor Network Modular Node Modeling and Simulation with VisualSense. In: "35th Annual Conference of the IEEE Industrial Electronics Society, IECON'09", 03/11/2009 - 05/11/2009, Oporto, Portugal. ISBN 978-1-4244-4648-3.

Otero Marnotes, Andres and Esteves Krasteva, Yana and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2010). Generic Systolic Array for Run-time Scalable Cores. In: "6th International Symposium on Applied Reconfigurable Computing (ARC)", 17/03/2010 - 19/03/2010, Bangkok, Tailandia. ISBN 978-3-642-12132-6.

Otero Marnotes, Andres and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa and Esteves Krasteva, Yana (2010). Run-time Scalable Systolic Coprocessors for Flexible Multimedia SoPCs. In: "2010 International Conference Field Programmable Logic and Applications (FPL)", 31/08/2010 - 02/09/2010, Milán, Italia. ISBN 978-1-4244-7842-2.

Esteves Krasteva, Yana and Portilla Berrueco, Jorge and Tobajas Guerrero, Felix and Torre Arnanz, Eduardo de la (2009). Using Partial Reconfiguration for SoC Design and Implementation. In: "VLSI Circuits and Systems IV", 01/05/2009 - 03/05/2009, Dresden, Alemania. ISBN 9780819476371.

Esteves Krasteva, Yana and Criado, Francisco and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2009). NoC Emulation based on Partial Reconfiguration. In: "XXIII International Conference on Design of Circuits and Integrated Systems (DCIS'2008)", 12/11/2008-14/11/2008, Grenoble, Francia. ISBN 978-28-4813-124-5. p. 36.

Portilla Berrueco, Jorge and Esteves Krasteva, Yana and Carnicer, Jose María and Riesgo Alcaide, Teresa (2009). Wireless Sensor Networks Node with Remote HW/SW Reconfiguration Capabilities. In: "23rd Conference on Design of Circuits and Integrated Systems, DCIS 2008", 12/11/2008-14/11/2008, Granoble, Francia. ISBN 978-28-4813-124-5.

Esteves Krasteva, Yana and Criado, Francisco and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2008). A Fast Emulation-Based NoC Prototyping Framework. In: "International Conference on ReConFigurable Computing and FPGAs (ReConFig'08)", 03/12/2008-05/12/2008, Cancún, México. ISBN 978-1-4244-3748-1. pp. 211-216.

Esteves Krasteva, Yana and Portilla Berrueco, Jorge and Carnicer, Jose María and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2008). Remote HW-SW Reconfigurable Wireless Sensor Nodes. In: "34th Annual Conference of the IEEE Industrial Electronics Society. IECON-2008", 10/11/2008-13/11/2008, Orlando, Florida, USA. ISBN 978-14-2441-766-7. pp..

Esteves Krasteva, Yana and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2008). Virtual Architectures for Partial Runtime Reconfigurable Systems. Application to Network on Chip based SoC Emulation. In: "34th Annual Conference of the IEEE Industrial Electronics Society. IECON-2008", 10/11/2008-13/11/2008, Orlando, Florida, USA. ISBN 978-1-4244-1766-7. pp..

Thesis

Esteves Krasteva, Yana (2009). Reconfigurable Computing Based on Commercial FPGAs. Solutions for the Design and Implementation of Partially Reconfigurable Systems = Computación reconfigurable basada en FPGAs comerciales. Soluciones para el diseño e implementación de sistemas parcialmente reconfigurables.. Thesis (Doctoral), E.T.S.I. Industriales (UPM).

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