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ORCID: https://orcid.org/0000-0002-3940-8009, Uren, M., Jiménez, A., Dua, C., Tadjer, Marko Jak, Cuerdo Bragado, Roberto, Calle Gómez, Fernando
ORCID: https://orcid.org/0000-0001-7869-6704 and Muñoz Merino, Elias
ORCID: https://orcid.org/0000-0001-7482-2590
(2011).
Thermal effects in Ni/Au and Mo/Au gate metallization AlGaN/GaN HEMT's reliability.
En: "9th International Conference on Nitride Semiconductors", 10/07/2011 - 15/07/2011, Glasgow, UK. pp..
| Título: | Thermal effects in Ni/Au and Mo/Au gate metallization AlGaN/GaN HEMT's reliability |
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| Autor/es: |
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| Tipo de Documento: | Ponencia en Congreso o Jornada (Artículo) |
| Título del Evento: | 9th International Conference on Nitride Semiconductors |
| Fechas del Evento: | 10/07/2011 - 15/07/2011 |
| Lugar del Evento: | Glasgow, UK |
| Título del Libro: | proceedings of 9th International Conference on Nitride Semiconductors |
| Fecha: | 2011 |
| Materias: | |
| ODS: | |
| Escuela: | E.T.S.I. Telecomunicación (UPM) |
| Departamento: | Ingeniería Electrónica |
| Licencias Creative Commons: | Reconocimiento - Sin obra derivada - No comercial |
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AlGaN/GaN high electron mobility transistors (HEMT) are key devices for the next generation of high-power, high-frequency and high-temperature electronics applications. Although significant progress has been recently achieved [1], stability and reliability are still some of the main issues under investigation, particularly at high temperatures [2-3]. Taking into account that the gate contact metallization is one of the weakest points in AlGaN/GaN HEMTs, the reliability of Ni, Mo, Pt and refractory metal gates is crucial [4-6]. This work has been focused on the thermal stress and reliability assessment of AlGaN/GaN HEMTs. After an unbiased storage at 350 o C for 2000 hours, devices with Ni/Au gates exhibited detrimental IDS-VDS degradation in pulsed mode. In contrast, devices with Mo/Au gates showed no degradation after similar storage conditions. Further capacitance-voltage characterization as a function of temperature and frequency revealed two distinct trap-related effects in both kinds of devices. At low frequency (< 1MHz), increased capacitance near the threshold voltage was present at high temperatures and more pronounced for the Ni/Au gate HEMT and as the frequency is lower. Such an anomalous “bump” has been previously related to H-related surface polar charges [7]. This anomalous behavior in the C-V characteristics was also observed in Mo/Au gate HEMTs after 1000 h at a calculated channel temperatures of around from 250 o C (T2) up to 320 ºC (T4), under a DC bias (VDS= 25 V, IDS= 420 mA/mm) (DC-life test). The devices showed a higher “bump” as the channel temperature is higher (Fig. 1). At 1 MHz, the higher C-V curve slope of the Ni/Au gated HEMTs indicated higher trap density than Mo/Au metallization (Fig. 2). These results highlight that temperature is an acceleration factor in the device degradation, in good agreement with [3]. Interface state density analysis is being performed in order to estimate the trap density and activation energy.
| ID de Registro: | 12930 |
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| Identificador DC: | https://oa.upm.es/12930/ |
| Identificador OAI: | oai:oa.upm.es:12930 |
| Depositado por: | Memoria Investigacion |
| Depositado el: | 07 Nov 2012 12:53 |
| Ultima Modificación: | 21 Abr 2016 12:15 |
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