Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support

Salvador Perea, Rubén and Otero Marnotes, Andres and Mora, Javier and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa and Sekanina, Lukás (2011). Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support. In: "2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)", 06/06/2011 - 09/06/2011, San Diego, CA, EEUU. ISBN 978-1-4577-0598-4. pp. 184-191.

Description

Title: Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support
Author/s:
  • Salvador Perea, Rubén
  • Otero Marnotes, Andres
  • Mora, Javier
  • Torre Arnanz, Eduardo de la
  • Riesgo Alcaide, Teresa
  • Sekanina, Lukás
Item Type: Presentation at Congress or Conference (Article)
Event Title: 2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)
Event Dates: 06/06/2011 - 09/06/2011
Event Location: San Diego, CA, EEUU
Title of Book: Proceedings of 2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)
Date: 2011
ISBN: 978-1-4577-0598-4
Subjects:
Faculty: E.U.I.T. Telecomunicación (UPM)
Department: Sistemas Electrónicos y de Control [hasta 2014]
Creative Commons Licenses: Recognition - No derivative works - Non commercial

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Abstract

This paper addresses the modelling and validation of an evolvable hardware architecture which can be mapped on a 2D systolic structure implemented on commercial reconfigurable FPGAs. The adaptation capabilities of the architecture are exercised to validate its evolvability. The underlying proposal is the use of a library of reconfigurable components characterised by their partial bitstreams, which are used by the Evolutionary Algorithm to find a solution to a given task. Evolution of image noise filters is selected as the proof of concept application. Results show that computation speed of the resulting evolved circuit is higher than with the Virtual Reconfigurable Circuits approach, and this can be exploited on the evolution process by using dynamic reconfiguration

More information

Item ID: 13323
DC Identifier: http://oa.upm.es/13323/
OAI Identifier: oai:oa.upm.es:13323
Official URL: http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5963934
Deposited by: Memoria Investigacion
Deposited on: 28 Nov 2012 09:02
Last Modified: 21 Apr 2016 12:38
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