Relating goal scheduling, precedence, and memory management in and-parallel execution of logic programs

Hermenegildo, Manuel V. (1987). Relating goal scheduling, precedence, and memory management in and-parallel execution of logic programs. In: "Fourth International Conference on Logis Programming", May 25-29, 1987, Melbourne, Victoria, Australia. ISBN 0262121255.

Description

Title: Relating goal scheduling, precedence, and memory management in and-parallel execution of logic programs
Author/s:
  • Hermenegildo, Manuel V.
Item Type: Presentation at Congress or Conference (Article)
Event Title: Fourth International Conference on Logis Programming
Event Dates: May 25-29, 1987
Event Location: Melbourne, Victoria, Australia
Title of Book: Logic programming, Proceedings of the Fourth International Conference
Date: May 1987
ISBN: 0262121255
Subjects:
Freetext Keywords: Logic programming, parallel processing, and-paralelism, Scheduling, Memory management, Coroutining, Prolog, Programación lógica, procesamiento paralelo, Programación, Gestión de la memoria.
Faculty: Facultad de Informática (UPM)
Department: Inteligencia Artificial
Creative Commons Licenses: Recognition - No derivative works - Non commercial

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Abstract

The interactions among three important issues involved in the implementation of logic programs in parallel (goal scheduling, precedence, and memory management) are discussed. A simplified, parallel memory management model and an efficient, load-balancing goal scheduling strategy are presented. It is shown how, for systems which support "don't know" non-determinism, special care has to be taken during goal scheduling if the space recovery characteristics of sequential systems are to be preserved. A solution based on selecting only "newer" goals for execution is described, and an algorithm is proposed for efficiently maintaining and determining precedence relationships and variable ages across parallel goals. It is argued that the proposed schemes and algorithms make it possible to extend the storage performance of sequential systems to parallel execution without the considerable overhead previously associated with it. The results are applicable to a wide class of parallel and coroutining systems, and they represent an efficient alternative to "all heap" or "spaghetti stack" allocation models.

More information

Item ID: 14531
DC Identifier: http://oa.upm.es/14531/
OAI Identifier: oai:oa.upm.es:14531
Deposited by: Biblioteca Facultad de Informatica
Deposited on: 21 Feb 2013 08:14
Last Modified: 21 Apr 2016 14:14
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