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Hardware Reuse Improvement through the Domain Specific Language dHDL.
Cita
Sánchez Marcos, Miguel Ángel, López Vallejo, Marisa 
ORCID: https://orcid.org/0000-0002-3833-524X and Iglesias Fernández, Carlos Ángel ORCID: https://orcid.org/0000-0002-1755-2712
(2012).
Hardware Reuse Improvement through the Domain Specific Language dHDL..
En: "10th International Symposium on Parallel and Distributed Processing with Applications (ISPA), 2012 IEEE", 10/07/2012 - 13/07/2012, Madrid. ISBN 978-1-4673-1631-6. pp. 857-858.
https://doi.org/10.1109/ISPA.2012.133.
ORCID: https://orcid.org/0000-0002-3833-524X and Iglesias Fernández, Carlos Ángel ORCID: https://orcid.org/0000-0002-1755-2712
(2012).
Hardware Reuse Improvement through the Domain Specific Language dHDL..
En: "10th International Symposium on Parallel and Distributed Processing with Applications (ISPA), 2012 IEEE", 10/07/2012 - 13/07/2012, Madrid. ISBN 978-1-4673-1631-6. pp. 857-858.
https://doi.org/10.1109/ISPA.2012.133.
Descripción
| Título: | Hardware Reuse Improvement through the Domain Specific Language dHDL. |
|---|---|
| Autor/es: |
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| Tipo de Documento: | Ponencia en Congreso o Jornada (Artículo) |
| Título del Evento: | 10th International Symposium on Parallel and Distributed Processing with Applications (ISPA), 2012 IEEE |
| Fechas del Evento: | 10/07/2012 - 13/07/2012 |
| Lugar del Evento: | Madrid |
| Título del Libro: | 10th International Symposium on Parallel and Distributed Processing with Applications (ISPA), 2012 IEEE |
| Fecha: | 2012 |
| ISBN: | 978-1-4673-1631-6 |
| Materias: | |
| ODS: | |
| Palabras Clave Informales: | Assembly, Distributed processing, Hardware, Hardware design languages, Libraries, Productivity, Space exploration |
| Escuela: | E.T.S.I. Telecomunicación (UPM) |
| Departamento: | Ingeniería Electrónica |
| Licencias Creative Commons: | Reconocimiento - Sin obra derivada - No comercial |
Resumen
The dHDL language has been defined to improve hardware design productivity. This is achieved through the definition of a better reuse interface (including parameters, attributes and macroports) and the creation of control structures that help the designer in the hardware generation process.
Más información
| ID de Registro: | 20504 |
|---|---|
| Identificador DC: | https://oa.upm.es/20504/ |
| Identificador OAI: | oai:oa.upm.es:20504 |
| URL Portal Científico: | https://portalcientifico.upm.es/es/ipublic/item/5620911 |
| Identificador DOI: | 10.1109/ISPA.2012.133 |
| URL Oficial: | http://ieeexplore.ieee.org/xpl/articleDetails.jsp?... |
| Depositado por: | Memoria Investigacion |
| Depositado el: | 07 Oct 2013 17:24 |
| Ultima Modificación: | 12 Nov 2025 00:00 |
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