Synchronous Buck converter with Output Impedance Correction Circuit

Svikovic, Vladimir and Oliver Ramírez, Jesús Angel and Alou Cervera, Pedro and García Suárez, Oscar and Cobos Márquez, José Antonio (2012). Synchronous Buck converter with Output Impedance Correction Circuit. In: "Applied Power Electronics Conference and Exposition (APEC), 2012 Twenty-Seventh Annual IEEE", 05/02/2012 - 09/02/2012, Orlando (Florida, USA). ISBN 978-1-4577-1215-9. pp. 727-734.

Description

Title: Synchronous Buck converter with Output Impedance Correction Circuit
Author/s:
  • Svikovic, Vladimir
  • Oliver Ramírez, Jesús Angel
  • Alou Cervera, Pedro
  • García Suárez, Oscar
  • Cobos Márquez, José Antonio
Item Type: Presentation at Congress or Conference (Article)
Event Title: Applied Power Electronics Conference and Exposition (APEC), 2012 Twenty-Seventh Annual IEEE
Event Dates: 05/02/2012 - 09/02/2012
Event Location: Orlando (Florida, USA)
Title of Book: Applied Power Electronics Conference and Exposition (APEC), 2012 Twenty-Seventh Annual IEEE
Date: February 2012
ISBN: 978-1-4577-1215-9
Subjects:
Faculty: Centro de Electrónica Industrial (CEI) (UPM)
Department: Otro
Creative Commons Licenses: Recognition - No derivative works - Non commercial

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Abstract

This work is related to the improvement of the output impedance of the Buck converter by means of introducing an additional power path that virtually increases the output capacitance during transients. It is well known that in VRM applications, with wide load steps, voltage overshoots and undershoots may lead to undesired performance of the load. To solve this problem, high-bandwidth high-switching frequency power converters can be applied to reduce the transient time or a big output capacitor can be applied to reduce the output impedance. The first solution can degrade the efficiency by increasing switching losses of the MOSFETS, and the second solution is penalizing the cost and size of the output filter. The Output Impedance Correction Circuit (OICC), as presented here, is used to inject or extract a current n-1 times larger than the output capacitor current, thus virtually increasing n times the value of the output capacitance during the transients. This feature allows the usage of a low frequency Buck converter with smaller capacitor but satisfying the dynamic requirements.

More information

Item ID: 20865
DC Identifier: http://oa.upm.es/20865/
OAI Identifier: oai:oa.upm.es:20865
Official URL: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6165900
Deposited by: Memoria Investigacion
Deposited on: 12 Nov 2013 18:57
Last Modified: 22 Sep 2014 11:21
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