Dreams: A tool for the design of dynamically reconfigurable embedded and modular systems

Otero Marnotes, Andres and Torre Arnanz, Eduardo de la and Riesgo Alcaide, Teresa (2012). Dreams: A tool for the design of dynamically reconfigurable embedded and modular systems. In: "Proceedings of International Conference on ReConFigurable Computing and FPGAs (ReConFig)", 05/12/2012 - 07/12/2012, Cancun (Mexico). pp. 1-8.

Description

Title: Dreams: A tool for the design of dynamically reconfigurable embedded and modular systems
Author/s:
  • Otero Marnotes, Andres
  • Torre Arnanz, Eduardo de la
  • Riesgo Alcaide, Teresa
Item Type: Presentation at Congress or Conference (Article)
Event Title: Proceedings of International Conference on ReConFigurable Computing and FPGAs (ReConFig)
Event Dates: 05/12/2012 - 07/12/2012
Event Location: Cancun (Mexico)
Title of Book: Reconfigurable Computing and FPGAs (ReConFig), 2012 International Conference on
Date: 2012
Subjects:
Faculty: Centro de Electrónica Industrial (CEI) (UPM)
Department: Otro
Creative Commons Licenses: Recognition - No derivative works - Non commercial

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Abstract

Dynamically Reconfigurable Systems are attracting a growing interest, mainly due to the emergence of novel applications based on this technology. However, commercial tools do not provide enough flexibility to design solutions, while keeping an acceptable design productivity. In this paper, a novel design flow is proposed, targeting dynamically reconfigurable systems. It is fully supported by a tool called Dreams, which is able to implement flexible systems, starting from a set of netlists corresponding to the modules, as well as a system description provided by the user. The tool automatically post-processes the nets, implementing a solution for the communications between reconfigurable regions, as well as the handling of routing conflicts, by means of a custom router. Since the design process of every module and the static system are independent, the proposed flow is compatible with system upgrade at run-time. In this paper, a use case corresponding to the design of a highly regular and parallel mesh-type architecture is described, in order to show the architectural flexibility offered by the tool.

More information

Item ID: 20888
DC Identifier: http://oa.upm.es/20888/
OAI Identifier: oai:oa.upm.es:20888
Official URL: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6416740
Deposited by: Memoria Investigacion
Deposited on: 19 Nov 2013 19:13
Last Modified: 22 Sep 2014 11:21
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