Using Partial Reconfiguration for SoC Design and Implementation

Esteves Krasteva, Yana and Portilla Berrueco, Jorge and Tobajas Guerrero, Felix and Torre Arnanz, Eduardo de la (2009). Using Partial Reconfiguration for SoC Design and Implementation. In: "VLSI Circuits and Systems IV", 01/05/2009 - 03/05/2009, Dresden, Alemania. ISBN 9780819476371.

Description

Title: Using Partial Reconfiguration for SoC Design and Implementation
Author/s:
  • Esteves Krasteva, Yana
  • Portilla Berrueco, Jorge
  • Tobajas Guerrero, Felix
  • Torre Arnanz, Eduardo de la
Item Type: Presentation at Congress or Conference (Article)
Event Title: VLSI Circuits and Systems IV
Event Dates: 01/05/2009 - 03/05/2009
Event Location: Dresden, Alemania
Title of Book: Proceedings of VLSI Circuits and Systems IV
Date: May 2009
ISBN: 9780819476371
Volume: 7363
Subjects:
Faculty: E.T.S.I. Industriales (UPM)
Department: Automática, Ingeniería Electrónica e Informática Industrial [hasta 2014]
Creative Commons Licenses: Recognition - No derivative works - Non commercial

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Abstract

Most reconfigurable systems rely on FPGA technology. Among these ones, those which permit dynamic and partial reconfiguration, offer added benefits in flexibility, in-field device upgrade, improved design and manufacturing time, and even, in some cases, power consumption reductions. However, dynamic reconfiguration is a complex task, and the real benefits of its use in real applications have been often questioned. This paper presents an overview of the partial reconfiguration technique application, along with four original applications. The main goal of these applications is to test several architectures with different flexibility and, to search for the partial reconfiguration "killing application", that is, the application that better demonstrates the benefits of today reconfigurable systems based on commercial FPGAs. Therefore, the presented applications are rather a proof of concept, than fully operative and closed systems. First, a brief introduction to the partial reconfigurable systems application topic has been included. After that, the descriptions of the created reconfigurable systems are presented: first, an on-chip communications emulation framework, second, an on chip debugging system, third, a wireless sensor network reconfigurable node and finally, a remote reconfigurable client-server device. Each application is described in a separate section of the paper along with some test and results. General conclusions are included at the end of the paper

More information

Item ID: 5511
DC Identifier: http://oa.upm.es/5511/
OAI Identifier: oai:oa.upm.es:5511
Official URL: http://spie.org/x648.html?product_id=821718
Deposited by: Memoria Investigacion
Deposited on: 20 Dec 2010 11:13
Last Modified: 18 Apr 2016 06:33
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