A method to obtain non-power-of-two FFT Flow graphs based on a new prime factor algorithm

Bautista Loza, Víctor Manuel ORCID: https://orcid.org/0000-0002-5077-4210 and Garrido Gálvez, Mario ORCID: https://orcid.org/0000-0001-5739-3544 (2025). A method to obtain non-power-of-two FFT Flow graphs based on a new prime factor algorithm. "IEEE Transactions on Signal Processing", v. 73 ; pp. 1004-1017. ISSN 1053-587X. https://doi.org/10.1109/TSP.2025.3540561.

Descripción

Título: A method to obtain non-power-of-two FFT Flow graphs based on a new prime factor algorithm
Autor/es:
Tipo de Documento: Artículo
Título de Revista/Publicación: IEEE Transactions on Signal Processing
Fecha: Febrero 2025
ISSN: 1053-587X
Volumen: 73
Materias:
ODS:
Palabras Clave Informales: Fast Fourier transform (FFT), non-power-of-two (NP2), index mapping, prime factor algorithm (PFA), butterfly.
Escuela: E.T.S.I. Telecomunicación (UPM)
Departamento: Ingeniería Electrónica
Grupo Investigación UPM: Laboratorio de Sistemas Integrados LSI
Licencias Creative Commons: Reconocimiento - Sin obra derivada - No comercial

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Resumen

This paper presents a novel method to obtain non-power-of-two (NP2) fast Fourier transform (FFT) flow graphs based on a new prime factor algorithm (PFA). The FFT flow graph is crucial for designing FFT architectures but previous works only provide systematic approaches to build flow graphs for power-of-two sizes (P2). Thus, the derivation of NP2 flow graphs is an important step towards the design of efficient NP2 FFT architectures.

The proposed approach consists of two independent parts. On the one hand, it obtains all the possible index mappings that lead to a flow graph with no rotations between butterflies. On the other hand, it determines the permutations between butterflies in the flow graph. By combining these two parts, the order of the inputs and outputs is derived. As a result, the entire flow graph is obtained systematically. Additionally, the proposed approach generates all the possible flow graphs for a given factorization of the FFT size.

The reduction in operations for NP2 FFTs using the proposed approach leads to a significant reduction in area and power consumption concerning P2 FFTs with similar sizes after implementing the proposed flow graphs directly in hardware. Particularly, there is a significant improvement between the proposed 30-point and 60-point FFT and previous efficient P2 FFTs. This remarkable fact sets NP2 at the forefront of FFT research after being in second place behind P2 FFTs for decades.

Proyectos asociados

Tipo
Código
Acrónimo
Responsable
Título
Gobierno de España
PID2021-126991NA-I00
RAFFTING
Mario Garrido
Implementación de FFTs Avanzadas para 6G

Más información

ID de Registro: 87889
Identificador DC: https://oa.upm.es/87889/
Identificador OAI: oai:oa.upm.es:87889
URL Portal Científico: https://portalcientifico.upm.es/es/ipublic/item/10332197
Identificador DOI: 10.1109/TSP.2025.3540561
URL Oficial: https://ieeexplore.ieee.org/document/10883046
Depositado por: Víctor Manuel Bautista loza
Depositado el: 17 Feb 2025 11:55
Ultima Modificación: 15 Oct 2025 01:01