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Top-down methodology employing hardware description languages (HDLs) for designing digital control in power converters
Cita
Laguna Ruiz, Leonardo, Prieto López, Roberto 
ORCID: https://orcid.org/0000-0001-7361-6816, Oliver Ramírez, Jesús Angel ORCID: https://orcid.org/0000-0002-5286-5378 and Cobos Márquez, José Antonio ORCID: https://orcid.org/0000-0003-4542-2656
(2008).
Top-down methodology employing hardware description languages (HDLs) for designing digital control in power converters.
En: "11th IEEE International Conference on Power Electronics (CIEP 2008)", 24/08/2008-27/08/2008, Cuernavaca (México). ISBN 978-1-4244-2718-5. pp. 133-137.
ORCID: https://orcid.org/0000-0001-7361-6816, Oliver Ramírez, Jesús Angel ORCID: https://orcid.org/0000-0002-5286-5378 and Cobos Márquez, José Antonio ORCID: https://orcid.org/0000-0003-4542-2656
(2008).
Top-down methodology employing hardware description languages (HDLs) for designing digital control in power converters.
En: "11th IEEE International Conference on Power Electronics (CIEP 2008)", 24/08/2008-27/08/2008, Cuernavaca (México). ISBN 978-1-4244-2718-5. pp. 133-137.
Descripción
| Título: | Top-down methodology employing hardware description languages (HDLs) for designing digital control in power converters |
|---|---|
| Autor/es: |
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| Tipo de Documento: | Ponencia en Congreso o Jornada (Artículo) |
| Título del Evento: | 11th IEEE International Conference on Power Electronics (CIEP 2008) |
| Fechas del Evento: | 24/08/2008-27/08/2008 |
| Lugar del Evento: | Cuernavaca (México) |
| Título del Libro: | Power Electronics Congress, 2008. CIEP 2008. 11th IEEE International |
| Fecha: | 2008 |
| ISBN: | 978-1-4244-2718-5 |
| Materias: | |
| ODS: | |
| Escuela: | E.T.S.I. Industriales (UPM) |
| Departamento: | Automática, Ingeniería Electrónica e Informática Industrial [hasta 2014] |
| Licencias Creative Commons: | Reconocimiento - Sin obra derivada - No comercial |
Resumen
This paper presents a research line oriented to develop methodologies that takes advantage of hardware description languages in order to simplify the design of power converters that employ digital control techniques. The methodology focuses on setting the adequate communications among subsystems in order to simplify the change of the levels of abstraction of the subsystem’s models (from the conceptual level to the actual electric + synthesizable code). Changing the level of abstraction in the design process pretends: first to provide useful models at early designing steps; second, to optimize the simulation of the system, and at same time optimize the verification step.
Más información
| ID de Registro: | 3408 |
|---|---|
| Identificador DC: | https://oa.upm.es/3408/ |
| Identificador OAI: | oai:oa.upm.es:3408 |
| URL Oficial: | http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp... |
| Depositado por: | Memoria Investigacion |
| Depositado el: | 22 Jun 2010 08:04 |
| Ultima Modificación: | 20 Abr 2016 12:56 |
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